That took a while...


Iff it turns out that it's a hardware problem with the 4GB-RAM units after they are sent out to customers: Is it possible to turn on/off 2 of the 4GB's of RAM with a hardware switch and use the Pyra with only 2GB's of RAM?
Altough I would really need the additional 2GB's of RAM (Java programming is very memory hungry) I could live with 2GB's
Well as long as the 4GB units haven't already been mass produced, it should be pretty straightforward to fix it if it is a hardware issue. But wasn't there 500 boards already produced where we had that eMMC drama? Can anyone confirm if those 500 were 2GB or 4GB boards?
 
AFAIK only blank PCBs have been ordered. Whether those become 2GiB or 4GiB boards depends on what chips are put on them.
 
Is the emmc speed issue confirmed to be resolved?
Sorta, it turned out in the tests the speed difference was next to nothing (103mbps while disabling the microsd/fix made it 113mbps or something like that.) so wasn't worth tossing out the boards to fix an issue so minor. So it will be left as is afaik.
(my phone copies files at about 20mbps just for comparison).
AFAIK only blank PCBs have been ordered. Whether those become 2GiB or 4GiB boards depends on what chips are put on them.
Oh that's good to know then!
 
Is the Pyra still 3.2cm thick? It looks thicker in the Video.
 
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Iff it turns out that it's a hardware problem with the 4GB-RAM units after they are sent out to customers: Is it possible to turn on/off 2 of the 4GB's of RAM with a hardware switch and use the Pyra with only 2GB's of RAM?
Altough I would really need the additional 2GB's of RAM (Java programming is very memory hungry) I could live with 2GB's
The 4GB memory chips work fine in standard 2GB software mode on all prototype CPU boards I have tested so far.
Only trying to make 4GB available in U-Boot (different EMIF config) and use it in kernel (LPAE enabled) raises issues in kernel.
The kernel boots, shows 4GB being available but runs instable.
Which might either be
- pure software (imprecise memory controller config, wrong virtual memory management, wrong cache management) or
- hardware (more noise, more power demand, more whatever, as soon as the second bank inside the 4GB chip becomes active).
Further tests to find out are planned but not yet done.
So turning 4GB off and using 2GB is just using the standard 2GB U-Boot and Kernel. No need for a hw switch.
 
@hns that means the pyra can run stable in 2GB mode, even when there is a 4gb chip soldered on it?


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@hns that means the pyra can run stable in 2GB mode, even when there is a 4gb chip soldered on it?

So far we have no indication of the opposite.

Is there any stability or speed difference between 2GB as four 512MB Vs 2GB as four 1024MB running @ half capacity? May be too early to know?
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Did someone just mention 8GB? :p
[joining your sarcasm]
Meh, peanuts! I have 48GB on my Linux desktop machine and my browser really flies! But I'm considering adding a 2nd CPU so I can activate the 2ND bank and go to 96GB to make more betterer! [/sarcasm]

Is 4GB a bad thing? Not really.
Is 4GB a must? Not really.
Is 2GB adequate to the SoC? Yes.
 
The 4GB memory chips work fine in standard 2GB software mode on all prototype CPU boards I have tested so far.
Only trying to make 4GB available in U-Boot (different EMIF config) and use it in kernel (LPAE enabled) raises issues in kernel.
The kernel boots, shows 4GB being available but runs instable.
Which might either be
- pure software (imprecise memory controller config, wrong virtual memory management, wrong cache management) or
- hardware (more noise, more power demand, more whatever, as soon as the second bank inside the 4GB chip becomes active).
Further tests to find out are planned but not yet done.
So turning 4GB off and using 2GB is just using the standard 2GB U-Boot and Kernel. No need for a hw switch.

Sounds serious. Finding RAM-releated issues can be a nightmare, I know that from the PC. ^^""" Let's hope it's not that complicated in case of the Pyra.
 
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