Prototype mainboards coming soon

[Black Sliver]

Adding more vias reduces the noise in the ground plane, so that could VERY much cause exact such issue.

? Interesting. Can someone give more information here?

You have to add the ripple/noise between SoC's GND and Cap's GND to the ripple between SoC's VCC and Cap's VCC to get the absolute voltage drop between Cap and SoC. All GNDs are connected, All VCCs are seperate. The idea is that the current/ripple from one VCC-GND pair (e.g. VCore) interferes with a more sensitive pair (e.g. VPLL).
The highest-impedence part of the GND connection is from the pad to the plane, which consists of traces and (soon to be more) vias.
(Also, by using more vias, most of the current will flow through the nearest via, which means you won't see as much of VCore's ripple on Vpll's GND-connection)

 

[mclien]

Just a wild thought to add new ideas: It migth be possible, that bunnie is at 33c3 in Hamburg after christmas. As he has lots of expierence in general developing (chumpy, novena etc) and is a nice guy, he might be interested to add ideas and be intrested in a meetup.
I could contact him to find ot if he would be interested..

 

[directive0]

Man if Bunnie helped with the Pyra that would be awesome. It would be like my ultimate home run small scale electronic device.

 

[mclien]

I'l try to find out if he is in Hamburg and has time to have a look.

 

[Bernd]

Hopefully all insects got terminated in this version.

A nice pyra as (self bought) birth day present would be cool.

 

[shaddim]

You have to add the ripple/noise between SoC's GND and Cap's GND to the ripple between SoC's VCC and Cap's VCC to get the absolute voltage drop between Cap and SoC. All GNDs are connected, All VCCs are seperate. The idea is that the current/ripple from one VCC-GND pair (e.g. VCore) interferes with a more sensitive pair (e.g. VPLL).
The highest-impedence part of the GND connection is from the pad to the plane, which consists of traces and (soon to be more) vias.
(Also, by using more vias, most of the current will flow through the nearest via, which means you won't see as much of VCore's ripple on Vpll's GND-connection)

Thank you for the indetail reply... I think I have an idea now, but I'm still not totally clear about it.
Sorry for being so persistent on this, but I should understand this as I work in a neighbouring field, even with electrical engineers doing similar things: is this about that the impedance of some gnd connection basically has a to high impedance (on a MHz frequencies) and therefore on dynamic (MHz) high load (with high currents), voltage variations/ripples occure therefore. Which then interfere (or have impact on) with some frequency relevant / sensitive component? And adding extra vias just creates shorter and better conductivity reducing the impedance? Where the noise comes here into game? The comment about common ground indicates that the grounds should have been better designed separated? Thank you for clearing my foggy understanding

 

[Black Sliver]

And adding extra vias just creates shorter and better conductivity reducing the impedance? Where the noise comes here into game?

I don't understand the second sentence quoted.
Anyway. Driving DC current through a resistor results in a voltage drop. Driving AC current through a resistor results in ripple/noise. At those frequencies, a copper trace has high resistance (actually impedance) because of the inductive part. For the actual voltage "inside" the chip, it does not matter where the voltage drop occurs (GND or VCC), but the GND noise will be on all voltages. Having ripple on PLL's or VCO's VCC may result in a bad chip clock, which may result in a stopped clock or invalid state inside the CPU.

The comment about common ground indicates that the grounds should have been better designed separated?

Nope. The GNDs have to be on the same level inside the chip for it to work. If they are connected inside, but not outside, you have high compensating currents inside the chip (-> more current through one pin/pad -> more voltage drop/noise), which makes things worse. Having truly separate GNDs (like AGND and DGND) is only common for ADCs and requires special layout inside the chip (GNDs may not be tied together inside the chip).

 

[matzesu]

Maybe if I get some money for Christmas, I think I could effort a Prototype..
and if EvilDragon sends me a 1,5 ghz massproduktion CPU Board after some months, why not??

So i can just load my Usual Emulators from Debian Repo, make some tweaks to the Controlls and will be apple to test some things in the first few months until the real mass production..

The only thing I need is the last revision of the Case, because I also want it to use on Unimog, so I need a strong hinge area..
and the Power Supplie..
then I will make the Pyra Prototype my EDC Handheld
Let's see how it's compare to my Pandora

 

[matzesu]

Dam autocorrection on my Apple IPhone...
Would be happy if the Pyra ditnt have this feature

 

[ptitSeb]

Dam autocorrection on my Apple IPhone...
Would be happy if the Pyra ditnt have this feature

I'll quote myself:

Mmm, you made a typo. I'm sure you wanted to write "Oh you have an iPhone! Poor you".

^^ (just kiding of course, Android autocorrect is no better).

 

[rygD]

Maybe if I get some money for Christmas, I think I could effort a Prototyp

Once again, I say do it if you can afford it. If you do, please let us know everything you do with it. I think you are one of the best purple to get one early since you would probably carry and use it frequently. If you got a clear case you could even put a card with moves for some of your favourite games in the bottom.

I don't usually get excited about other people getting things. @Grench and other prototype buyers, looking forward to whatever you share.

 

[mecksg1]

So are they going to do the pyra auction now? Or are we still waiting? Cause I'm game to get one asap

 

[EvilDragon]

We're auctioning once we have those units finished. The first ones will go to those who already ordered a prototype.
That said, the only things missing now for those are the keymats and the cases, and I've got some news about these.
I just didn't have the time to post much as I had to ship over 200 packages during the last few days (christmas time in an online shop) and catched my usual pre-christmas flu (probably from being overworked).

I'll update you soon

 

[EvilDragon]

I'l try to find out if he is in Hamburg and has time to have a look.

Sure, the more ideas the better

 

[neko]

I just didn't have the time to post much as I had to ship over 200 packages during the last few days (christmas time in an online shop) and catched my usual pre-christmas flu (probably from being overworked).

Wow. I ordered some stuff yesterday, but I wasn't expecting to receive it before Christmas. I figured the Christmas rush would have been finished by now.

 

[mecksg1]

We're auctioning once we have those units finished. The first ones will go to those who already ordered a prototype.
That said, the only things missing now for those are the keymats and the cases, and I've got some news about these.
I just didn't have the time to post much as I had to ship over 200 packages during the last few days (christmas time in an online shop) and catched my usual pre-christmas flu (probably from being overworked).

I'll update you soon

Well take the holiday and have a fun time with your family. You deserve it big time

 

[mclien]

Sure, the more ideas the better

I'll let you know if/when I get contact with him. Have we in theory a way to get hardware to Hamburg? (I may have someone who might help out with equipment).
anyone here, who has planned to be at 33c3? (I skipped this year, so have no ticket).

 

[juliano]

First of all sorry for being away for some time. Looking at this HW issue this seems to me a Power Integrity issue probably due to SSN (simultaneous switching noise), where the digital signals are causing excessive crosstalk on the PDN (Power Delivery Network) generating noise on the PDN (VDD/VCC and GND) that leads to a reset.Using more vias and decoupling capacitors are certainly the way to go. As more vias are added to the design it decreases the GND impedance and makes it easier for the high frequency current to return. I just made a simple simulation showing how the noise generated by a 2GHz clock on a nearby PCB trace is decreased as we add more vias connecting the GND net at different layers:

Spoiler: Vias Animation

http://esss.com.br/www_cae/Ansoft_Install/pyra/vias_xtalk.gif

The target impedance is decreaseng over the decades as we can see here:

Spoiler: PDN Target Impedance

http://esss.com.br/www_cae/Ansoft_Install/pyra/impedancePDN.jpg

But this is a fixed value, in reality we have a mask that defines the target impedance for a component (here the OMAP) as a function of frequency, since the layout of the PDN and the capacitors are all working together and are responsible for these resonances. Here ais an example of impedance mask:

Spoiler: Impedance Mask

http://esss.com.br/www_cae/Ansoft_Install/pyra/impedancemask.png

Finally, I have some slides that shows how the capacitors changes the PDN Impedance, the noise on the VDD and also radiated emissions.

Spoiler: Power Integrity Capacitors

http://esss.com.br/www_cae/Ansoft_Install/pyra/pi.pdf

This is a common issue today and I will be more than happy to evaluate the designs before sent to prototyping (if it's not too late already).

 

[mclien]

Generally bunnie is willing to help. He is at 33c3, but says that he would not be much of a help, without having deeper knowledge about the actual hardware design.
So question is: is there some sense to meet up with him at 33c3 (and if who of the involved guys here is the most fitting person to do so? Nikoaus, ED, some other hardware guy)?
I for sure are the wrong guy for that topic.
I'll keep you informed about my other question, if he is wiling to spend more time "digging" into it (he has to put reasonable amount of time into it, to be of help I guess).

 

[Grench]

I don't usually get excited about other people getting things. @Grench and other prototype buyers, looking forward to whatever you share.

If only I had anything to share. It has been a long wait, but I'm still looking forward to it.