Comprehensive Status update!

Not having any solid expectations on when it ships is the best way to keep your sanity. As soon as you put hopes on a specific date, you set yourself up for disappointment.
For me, I like a date to look forward to, if it's not met then I immediately start looking forward to the revised date. Not having one at all actually makes me nervous and anxious.
Yes, there was a post from ED a while ago showing the colors, but they were not killer colours... but how about the keyboard layout?
Has there ever been a thread about a date for the keyboard color discussion?

It's like the heisemberg principle!
You mean there will be a kitten dying when an ACTUAL release date will be announced? :(
(Oh, and btw, just to get the bean count right: The man was named Heisenberg! Werner Karl Heisenberg.)
Will there be any gameplay\performance\capabilities videos? At least personally, these help me be more comfortable in making the buying choice.

Yes, once we got further with the development :)

According to my contact, the cases in Greece should also be almost finished now, new samples should arrive soon.
Nice to see everything moving along. I would have hoped to get the Pyra before i fly home for Christmas vacation but i will be more happy to wait even a few months to make sure all the kinks are gone.
I don't write much but I've been following the progress steadily and i'm very excited to see the final product.
yep, would have enjoyed showing off the Pyra to my brother when he comes to visit at Christmas, but i suppose i should make a trip out that way anyway...
Memory bandwidth is therefore 32 bits x 2 channels ~= 64 bits in both 2GB and 4GB RAM options, right ?
times 1066 MT/s yields just under 8 GB/s of bandwidth, under ideal circumstances. The 4GB ram might have slightly worse bandwidth since I think it needs to insert a bus turnaround cycle when switching between ranks (at least when reading). On the other hand two ranks means 16 banks in total, which potentially saves the amount of (relatively expensive) row activation for some workloads.

Either way it's probably not a significant difference.
If it's two dices of memory, 32bit

Eh, no, there are two 32-bit channels connecting to four 16-bit wide memory devices (32-bit wide ddr3 devices do not exist).

could we have 8GB memory?

In theory yes, but I think it would be quite expensive.

(In case anyone wonders: yes, 8GB would be the final limit: larger dual-rank ddr3 memory devices do not exist. Moreover the SoC does not support addressing more than 4GB/channel.)