DDR3 allows the timing to be adjusted per byte lane in steps of a small fraction of a nanosecond, and the omap5 can perform this adjustment automatically (this is known as "hardware leveling"). Also the speed at which it runs (DDR3-1066, i.e. 533 MHz) is not very high compared to PCs.
Thank you. I didn't know.
As EvilDragon pointed out it's four chips either way, otherwise you'd slash your memory bandwidth in half.
Good. At the time I thought it was going to be 2 chips according to an earlier
@EvilDragon post, but now it's clear it's 4 chips for both options.
Memory bandwidth is therefore 32 bits x 2 channels ~= 64 bits in both 2GB and 4GB RAM options, right ?
You're correct that standby current would be expected to double, because the dual-rank chip is basically two single-rank chips in one package. When actively in use however I'd expect data transfer to be the main factor in ram power consumption, which should be similar for 2GB and 4GB.
Makes sense, but I don't have much clue in how to estimate how long it is in active use, how long stands by and how long RAM is switched off (system hibernated or something).
If the state that doubles is a small value compared to the states that stays fixed (between 2GB and 4GB) but it happens during a lot more time, it might still have some impact. Or the critical value might just be
the instantaneus maximum power not the total in some period (so that as long as the state that doubles stays smaller than the fixed bigger state it's OK). Who knows?
How long the memory is in each state might be the same with 2GB and 4GB systems under the same workload or it might be different, depending on the workload
(accessing disk or cached in RAM, etc.). So, yes, we know one of the variables in an equation doubles but we don' know others. I'm blank, but you people
with experience just know you never heard of a problem in these situations or something like that, and have more intuition for ballpark ranges for the unkonwn values.
Which generation of memory chips is being used is also a factor, as power consumption still keeps going down.
Certainly, but I'm not sure which chips or generations we're talking about. Maybe nobody is completely sure until it is ordered, because the market can still change.
I'm not sure the
wiki is up to date.
Btw. I
see there're 16 2GB preorders and 901 4GB preorders. I'm not sure if prototypes are included there (I'm guessing no). The original post said the plan is building about 15 units with 2GB,
and there's another one which will get the battery contacts fixed, so that's maybe already all the 2GB units preordered. I guess I'm missing some units as prototypes or whatever,
but when the wiki says 2GB preorders might be too few to keep the option, I see it the other way around. Those 2GB are almost already produced. If all work fine ED could even
honor the existing preorders and close the 2GB option for future preorders, if MOQs or whatever require that.
Unfortunately current DDR3 memory chips don't bother giving power consumption values when operated at slower speeds than DDR3-1333 anymore, so I don't have any concrete values, and they only specify worst-case values anyway. We'll have to see.
Welll, yes, I guess there's only so much you can foresee on paper. That's why I'd sugested to test things well before commiting to big expenses. But that is also an expense (time is money, iterations are money).
I don't know the likeliness of problems and those doing it know it, so it's OK. Knowledge and experience is what strikes the balance, so I can't help there.
Btw, I want to join ED in his thanks, and that includes you, zmatt. For what ED said and for helping explain things to those of us who know less:
A huge thanks to Nikolaus, Fatih, my contacts in Greece and Austria, Global Components, everyone involved with the software development for the Pyra (OS, Kernel, anything), all investors, the prototype-preorders and of course: You.
