Whatever "handicapped" is. zmatt was running the "handicapped" eMMC with 103MB/s already today.
To be specific, the results I get are:
(dd iflag=direct if=/dev/mmcblk1 of=/dev/null bs=4M count=256)
read 96 MHz 8-bit: 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 12.9219 s, 83.1 MB/s
read 96 MHz 8-bit: 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 12.9004 s, 83.2 MB/s
read 128 MHz 8-bit: 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 10.3783 s, 103 MB/s
read 128 MHz 8-bit: 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 10.4196 s, 103 MB/s
read 192 MHz 8-bit: (fail)
(dd oflag=direct of=/dev/mmcblk1 if=/dev/zero bs=4M count=256)
write 96 MHz 8-bit: 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 14.1563 s, 75.8 MB/s
write 96 MHz 8-bit: 1073741824 bytes (1.1 GB, 1.0 GiB) copied, 14.0769 s, 76.3 MB/s
write 128 MHz 8-bit: (fail)
I've also tested 128 MHz read / 96 MHz write with random data instead of zeros to ensure the interface would get properly stressed, this also gave no errors.
(Note that it was already my expectation that write would give problems sooner than read.)
103MB/s is still ~90MB/s less than it should run, we'll see how it works when a prototype CPU board is modified disabling the mux.
Keep in mind that a theoretical "192 MB/s" is still not going to result in a real-world 192 MB/s, as seen by the fact that "96 MB/s" and "128 MB/s" become 83 MB/s and 103 MB/s respectively even under the best conditions I can easily create right now.
To give another point of reference, here's an UHS-I SD card at 48 MHz:
read 48 MHz 4-bit: 268435456 bytes (268 MB, 256 MiB) copied, 11.8947 s, 22.6 MB/s
100MBps+ seq. read speeds are nice, but I don't plan to pull large files off me eMMC often myself
Fair enough, although since the concern was the mux I've been specifically testing the interface between omap5 and eMMC, not really the eMMC itself.
And if this really is delaying half of the bus lines, I'd like to know whether writes are reliable, as a corrupted OS is a bit of a faff to recover from.
Every command and every block of data is protected by a CRC, so silent errors are not possible.
The better question is whether the driver recovers gracefully from CRC errors by retrying the failed transfers, or even switching to a lower speed if necessary. The answer to that is: no, its way of dealing with errors in general currently is:
return -EIO; /* make it someone else's problem */
(comment added by me
)
I think this is something that... deserves a bit of attention (regardless of mux). Fortunately it's
just software™.
This isn't like the Pandora, where people with no understanding of the technology complained that the SD cards were too slow; or how the wifi never quite worked right for some people, an unfortunate lack of resources; there is a legitimate complaint here that a decision was made before all the facts were had and that decision has lead to an imperfect device with a component behaving lesser than it could be.
I don't understand the distinction you're trying to make. All properties of a design can be considered results of decisions someone made at some point. It's moreover impossible to make all relevant decisions fully informed by all facts that might be relevant, the Pyra would never come to exist. Moreover all facts
were available here, the problem is putting them together, not forgetting about one, and realizing that a problem exists.