steven just fo my couristity where is the difference betwen the arm floats and the x86 floats? little vs big endian? different size of the mantisse / exponent? different operations for floats?
what kind of operations are used how often? mad, mul, div, add, sub are supported by arm, right? if they are handled nativly, and more exotic functions stay software only, it would still by a big speed boost.
My understanding, which is extremely limited, and only based on doing a little bit of reading after going through this thread is:
- QEMU translates incoming code from the destination platform (X86 in our case) into an intermediate language
- This intermediate language is then compiled/assembled into something for our target CPU (which is ARM)
- During the translation, all floating point operations go through the soft float implementation, which ultimately means all floating point operations are actually performed as integer operations
The reason for doing all floating point calculation as integer calculations is to ensure you get exactly the same results, two different CPUs can calculate different results otherwise (it appears the error cases are the most common to go wrong, i.e. when invalid numbers 'NaN' are passed in) but presumably other cases can also go wrong depending on the FPUs implementation. There are also limits as to what functionality the FPU supports (some architectures will have instructions not supported by other architectures). As an example of floating problems, recently I had something in my code which did something like '32 * 0.375' which is 12, only the FPU I was doing it on decided the result was actually 11.9999999. My code was casting this to an integer, which means the fractional part gets discarded, so on all other platforms it remained at 12, but on this one platform it got truncated to 11. This then caused major breakages (as you can imagine). So having FPU operations performed exactly right (down to the last bit) is the goal of QEMU, with good reason.
In terms of how do you implement floating point maths using integers, well the source code is in softfloat.c - and as you can see it is relatively complicated. The patch lunixbochs implemented was from an old version of QEMU that just performed all the FPU operations using the FPU on the Pandora. This means that 'result = 12.1 + 13.2' stays as 'result = 12.1 + 13.2', so an instruction for an instruction. If everything was this simple we could emulate a 1 GHz x86 machine with our Pandora! This obviously isn't the case but it gives you some idea. Instead, if we use the soft float implementation, a 'simple' add operations becomes tens if not hundreds of lines of C code, I don't know offhand what this compiles down to, but I should imagine at least 10's of instructions in the hot path (as in instructions that will get executed the majority of the time). So you end up with something that is 10X slower than the native version (the number 10 I am just pulling out of thin air here).
In terms of endian, right now I think we are only interested in little endian, so this probably doesn't come into play.
With regards to how often does this slow code get used, lunixbochs has indicated quite a lot, at the very least floating point operations are the biggest bottle neck at the moment (I believe that is what he said).
Finally, the question of can we implement certain functions natively, get a speed boost, and relatively few problems, I don't know the answer for sure. I hope yes, and it is certainly my suggestion of something to potentially to try. I am just aware it is a lot easier for you and I to suggest things than it is to pull ones sleeves up and help contribute to the project. Plus, I feel probably lunixbochs is already aware of most of the suggestions here.
EDIT:
@notaz it also says:
- Floating point library supporting both full software emulation and native host FPU instructions.
On the web site for QEMU, which doesn't seem true any more at least...
EDIT1:
@notaz I did also ask on IRC if there is a fork/sub-project based on QEMU that favours speed over bit accuracy, to which the answer was none they were aware of. Maybe if we do end up with something here that works well with some native FPU they may decide our changes can go upstream after all. I also asked about whether they did any benchmarks before removing, as it seems softfloat is going to degrade performance for a lot of applications, the response was simple 'bit-accuracy wins over performance'. It isn't what I'd like to see/hear but there we go.