As someone who has designed many boards, I have never found JTAG to be practical for board testing.
For programming FPGAs and debugging microprocessors, it is fine, but you seldom use more than one FPGA per design. Usually you end up with a separate JTAG port for each device that supports JTAG because daisy chaining the JTAG through multiple devices from different manufacturers complicates FPGA programming and microprocessor debugging.
Also quite often most of the ICs on the board don't support JTAG, so JTAG testing would only get partial coverage.
If you consider that ED will receive the same amount of boards he has as with the pandora (I hope it will be less, as the old boards had more problems than the new ones) you would still say it is a feature he shouldn't have on the board?
I don't design boards for work myself, but the PCBs that had to be checked were done faster by running the boundary scan test than writing a self-test firmware. From scratch the tool could check the PCBs CPU/FPGA in less than 5 minutes (incl. searching for the bsdl).
With a bit more effort I could check flash, RAM and the daughter-board. Some parts you can't test as they are out of your net, but that depends mostly on the design you've made.
Also the MIPI standard that is used can be accessible from the SD-Card slot (if it has been designed to do so on the PCB), you can debug from there also.
But I can't tell if it will take ++hours to design the PCB to work with those standards, it should stay cost effective in the end.
If we want to go in depth it might be wise to open a different topic about this.