God Ginrai
Godmaster
No, EvilDragon was specifically referring to ABCXYZ buttons. This topic has already been discussed, please don't make like Grench with x86 and do the same w/ the face button discussion.
-God Ginrai
MIPI woes, good design ideas and headaches
- Thread starter EvilDragon
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-God Ginrai
Null
Snug
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TeDaDeS
Forum Addict!
ED are you using boundaryscan on your PCB for testing? Might also be useful in the future when you'll get returns from customers.
Putting the CPU on a daughter-board in the final design might be more complex/expensive, but could be useful for upgrading in the future.
Also the board with LCD/keyboard/nubs could be cheaper to produce that way (only +/-2 layers). And broken nubs are replaced without the more expensive CPU board.
Putting the CPU on a daughter-board in the final design might be more complex/expensive, but could be useful for upgrading in the future.
Also the board with LCD/keyboard/nubs could be cheaper to produce that way (only +/-2 layers). And broken nubs are replaced without the more expensive CPU board.
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That's what we're trying to do... But the nubs can't really break 
slaeshjag
¯\_(ツ)_/¯
Don't tempt fate, remember the volcano?
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slaeshjag
¯\_(ツ)_/¯
In case you didn't get it; way back, ED said OpenPandora had have so many issues, nothing more could possibly go wrong. Only a volcano could cause more delays.
A month or so later, enter Eyjafjallajökull.
A month or so later, enter Eyjafjallajökull.
ShleeDragon
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Nubcano!, sounds like a great film.
cruelcynic
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I have been looking for an open platform with that button configuration for some time. Looks like I will be getting a Pyra.lfmao
Looks like a bird eating spidey
Got to have those buttons for Street Fighter's soft/med/hard punch/kicks. I'm very glad we getting this layout on Pyra
TeDaDeS
Forum Addict!
My wife can break anything, so I'll really laugh (and be sad at the same moment) when they break while she plays.That's what we're trying to do... But the nubs can't really break
If you haven't tried the boundaryscan thing before, best to have it when you start designing the (CPU) board. More generic info here: http://en.wikipedia.org/wiki/Boundary_scan
You could solder the jtag cable for testing yourself, some tooling from JTAG is free and that would include the easiest one with the 'stick cable in and if its green the PCB is okay' tool. Most parts probably already support it already, so it's just a feature you can enable if you have the PCB lanes on the board.
That sounds like something the designer needs to do, not me
Grench
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So... now I'm your standard by which to insult others?
God Ginrai
Godmaster
No, you are a convincing example that will make him think twice about what he is saying.
-God Ginrai
TeDaDeS
Forum Addict!
You are correct, but it might help you also in the future when people return a 'defective' board.That sounds like something the designer needs to do, not me
Plug in the JTAG cable in the board and the tool will turn green if the board is functioning correctly, red if it failed. (some customers could do it themselves)
(In production you could go further as it can tell which smd solder doesn't function well etc.)
The old pandora didn't have the feature build-in, and it's so easy to add by the PCB designer.
But that is something to consider when you are in the PCB design stage, guessing there are still some more important things to sort out (like CPU and everything else
).On the MIPI part, search for some open-source projects that use a screen from the same brand and see what they do (brands tend to stick with similar instructions, that might help you get screens somewhat active).
DAP
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As someone who has designed many boards, I have never found JTAG to be practical for board testing.
For programming FPGAs and debugging microprocessors, it is fine, but you seldom use more than one FPGA per design. Usually you end up with a separate JTAG port for each device that supports JTAG because daisy chaining the JTAG through multiple devices from different manufacturers complicates FPGA programming and microprocessor debugging.
Also quite often most of the ICs on the board don't support JTAG, so JTAG testing would only get partial coverage.
For programming FPGAs and debugging microprocessors, it is fine, but you seldom use more than one FPGA per design. Usually you end up with a separate JTAG port for each device that supports JTAG because daisy chaining the JTAG through multiple devices from different manufacturers complicates FPGA programming and microprocessor debugging.
Also quite often most of the ICs on the board don't support JTAG, so JTAG testing would only get partial coverage.
hns
Well-Known Member
Agreed. For JTAG to work you need more equipment than turning on power and looking what happens. And especially with SoCs - if the CPU responds (and for that you need only power and clock and UART) you can load U-Boot and shake the GPIOs by software to see if components answer. Such code will also be integrated into some self-test software.JTAG is required to bring up a completely new CPU or e.g. port Linux to a completely new CPU. Then you must be able to analyse and single step through the initial boot process.
And we design the peripherals around the chosen SoC by prototyping and connecting to some working OMAP5 EVM. So there will be nothing to test or debug through JTAG.
Basically our requirement to see an eval board and a working Linux for the chosen SoC is a translation of the requirement to avoid to work with JTAG and spend too much time with such very basic things.
Finally about board testing if defective. If the SoC does not respond you are lost anyways and the only option is to replace it. Regarding broken solder joints - that can happen but is quite simple to detect. E.g. if a single Nub does not respond on I2C - it must have a broken joint. If no device responds on I2C it is likely to be on the SoC end. The i2cdetect command will tell.
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Linux-SWAT
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* wrong thread post
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TeDaDeS
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If you consider that ED will receive the same amount of boards he has as with the pandora (I hope it will be less, as the old boards had more problems than the new ones) you would still say it is a feature he shouldn't have on the board?
I don't design boards for work myself, but the PCBs that had to be checked were done faster by running the boundary scan test than writing a self-test firmware. From scratch the tool could check the PCBs CPU/FPGA in less than 5 minutes (incl. searching for the bsdl).
With a bit more effort I could check flash, RAM and the daughter-board. Some parts you can't test as they are out of your net, but that depends mostly on the design you've made.
Also the MIPI standard that is used can be accessible from the SD-Card slot (if it has been designed to do so on the PCB), you can debug from there also.
But I can't tell if it will take ++hours to design the PCB to work with those standards, it should stay cost effective in the end.
If we want to go in depth it might be wise to open a different topic about this.
Our testing SD card on the Pandora takes about 1 Minute to test everything (incl. SD card slots, USB ports and keyboard, which can't be checked automatically with JTAG anyways.
