MWeston
Internal Development
Yeah, I'm drooling all over this thing right now.
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the latter.'mali' said:Just a question, what is the topmost chip on the SoC? Is it the CPU or is it the PoP RAM?
No - I think that would be an awful idea.'Benjiro' said:what do you think about it? Risk waiting a month longer, and get one with more power saving?
Well, if he's holding off, so am I!'craigix' said:I'm not buying a Pandora until we see the OMAP5.
'Laurent' said:I'm personally more excited about out of order execution/speculative execution/register renaming, removing a lot of the burden on the compiler/code generator for scheduling and relieving register pressure for avoiding false dependencies. And smaller pipeline, meaning lower mispredict penalty (and with interpreters in emulators every emulated instruction is probably a mispredict). It may also have 4-way NEON, not totally sure on this one, I bet you could clarify that part.'MWeston' said:IVA3
I wonder if that'll use the same C64x+ DSP...
@mali : the pipelined VFP indeed is one strongpoint of A9, but there are some others
Isn't OMAP5 available already? And no where near as powerful as OMAP3?'craigix' said:I'm not buying a Pandora until we see the OMAP5.
Haha, yes. You're starting to sound like someone else now...'lulzfish' said:I'm waiting for it to go x86.
'EdCa22' said:Haha, yes. You're starting to sound like someone else now...'lulzfish' said:I'm waiting for it to go x86.
I think that was the point.
'Exophase' said:I'm personally more excited about out of order execution/speculative execution/register renaming, removing a lot of the burden on the compiler/code generator for scheduling and relieving register pressure for avoiding false dependencies. And smaller pipeline, meaning lower mispredict penalty (and with interpreters in emulators every emulated instruction is probably a mispredict).
Yes, Cortex-A9 has all of that. And some other nice improvements
QUOTE
It may also have 4-way NEON, not totally sure on this one, I bet you could clarify that part.
I could but then I'd have to kill you or, worse, lose my job
'Laurent' said:'Exophase' said:I am personally more excited about out of order execution/speculative execution/register renaming, removing a lot of the burden on the compiler/code generator for scheduling and relieving register pressure for avoiding false dependencies. And smaller pipeline, meaning lower mispredict penalty (and with interpreters in emulators every emulated instruction is probably a mispredict).
Yes, Cortex-A9 has all of that. And some other nice improvements
QUOTE
It may also have 4-way NEON, not totally sure on this one, I bet you could clarify that part.
I could but then I would have to kill you or, worse, lose my job
wait, laurent has access to an a9?
*reaches for pliers and other useful truth extraction tools..*
on a tangent, i am planning on arranging a spectacular showdown between my pandora and my (yet to order) efika (moto^H^H^H freescale mpc5100, e300@400MHz - basically vanilla 603e - no simd). tickets for the match available soon.
Yes, Laurent has access to some very privileged information.. he's pretty water tight but it's often apparent that he knows these things :>'darkblu' said:wait, laurent has access to an a9?
*reaches for pliers and other useful truth extraction tools..*
on a tangent, i am planning on arranging a spectacular showdown between my pandora and my (yet to order) efika (moto^H^H^H freescale mpc5100, e300@400MHz - basically vanilla 603e - no simd). tickets for the match available soon.
of course it is an mpc5200b - i have been reading lately about the mbx-equipped 5100 so that was a freudian slip on my part. the 5100 also has bigger L1 caches, so it may have clouded my expectations of the 5200. truth be told, tough, genesi are rumored to have a 5121-based in the works, so we will see (as i mentioned i am still to order the thing). anyway, i am constantly on the search for good ppc implementations, so if you know of anything worth checking let me know.'Exophase' said:Is your Efika board not really MPC5200B instead? If so, I think Cortex-A8 at 600MHz will win in most cases (unless you need double precision or IEEE754 compliant floating point). 256KB of L2 cache is a huge advantage.