WizardStan
Mega GP Mania
- Joined
- May 24, 2008
- Messages
- 16,731
They are additional but not directly accessible general purpose CPUs with DSP instructions. With regular cores you just create a new thread and the OS can take advantage of additional cores automatically. With these you need to write code specifically for them and do something that I don't even know what to get them to run that code.
I've written code for M4s before, it should be easier to use them than the Pandora's DSP, but I'm not certain how much easier. Could be much easier, could be only slightly. At the very least you don't need some fancy SDKs or IDEs to compile for it, just a gcc cross compiler will do.
I've written code for M4s before, it should be easier to use them than the Pandora's DSP, but I'm not certain how much easier. Could be much easier, could be only slightly. At the very least you don't need some fancy SDKs or IDEs to compile for it, just a gcc cross compiler will do.