...which can be done in a way that does not involve throwing false conclusions and inaccurate statements into the room.
I'm sure many would appreciate it if you simply would put the same time you'd need to write such long texts simply into improving your short ones, quite a...
In my experience a lot of people doesn't understand even what an ISA is, or don't know nothing about computer architecture (today you can use a computer without knowing about that). In theses cases if you goo a bit deep most people don't follow (for example decades ago it was usual people likeing computers touched the lowest layer in programming, but today a lot of people have never touched or studied those levels). On other subjects there is no tech knoledge needed, so you could go on.
In any case I don't know about electronics/chips but about computer archt.
TI uses their own custom low power process, though
It is obvious: OMPA5 is a SOC for portable and mobile applications, so it must have low power in mind. But I hope you understand I think that a OMAP5432 from 2013 fabbed in 28nm and without FinFFET and with two 32 bit cores, will be worse than a Atom x5-Z8500 from 2015 fabbed in 14 nm (like best recent smartphones SOC) with TriGate/FinFET and four 64 bits cores.... a cutting edge mobile SOC for today standards
And yes, I suppose that Intel will have a lower power need for the same work.
But
more important for me is that I think BOTH, Intel and TI have something to hide: how many watts under stress? What TDP under stress?
Intel talks about SDP
(they want to hide traditional TDP) and even TI doesn't told. For me its the same: both hide it in some way.
On other side I have seen both have 2 MB cache while initially I was thinking OMAP5 would have a smaller cache (cache eats a lot of transistors, so with a 28nm fab it will be much bigger than with a 14nm fab).
Of course: wait untel both be tested (same OS, same work).
PD: By the way a few time ago I entered TI web to download tech doc, but today you have to register
