How Feasible Would It Be To Mate Pandora With FPGA?

[monstercameron]

I was surfing the webz and I found this chip/soc the Xilinx Zynq and I though would it be possile for the pandora community work on a gpu to run in the fpga fabric or just to compile the software to run on the fpga (like c to gate or python to fpga). This maybe be very engineering heavy but could maybe release pandora from using powervr binary blobs and possible NDAs, it also would then have wider appeal being both a software/hardware dev tool, a retro/modern gaming machine and free of any propietary sotware(just maybe!).


Maybe this would be great for P2?


here is a dev board with this soc zedboard

 

[rohezal]

would be very handy for emulators i think.

 

[Exophase]

The slow interconnect to FPGA over USB would kill most potential uses..

 

[monstercameron]

but this is a fpga with builtin dual a9 cpu cores which has its own interconnect to fpga fabric...

 

[Exophase]

but this is a fpga with builtin dual a9 cpu cores which has its own interconnect to fpga fabric...

I mean the interconnect between the Pandora and the FPGA. Even streaming textures to the FPGA and streaming back a framebuffer would be demanding for USB2.


And I don't think you can get a faster connection than USB2 off the Pandora's SoC. The external memory interfaces are all taken.


It's questionable how good of a 3D accelerator you can do on an FPGA of this level to begin with.

 

[monstercameron]

oh not on the current pandora but using the soc in the links I provided the xillinx zync arm a9 dual core with built in fpga fabric

 

[Exophase]

Yes I did read the links when you posted them.. would would you expect Pandora 2 to connect to this with? It (the FPGA) doesn't have USB3. And those Cortex-A9s are probably not going to help you much vs the CPU cores Pandora 2 will have, if you really want an FPGA for something you're probably better off forgoing one with embedded CPUs.

 

[Binky]

I thought the suggestion was to have a combined FPGA-ARM chip (as in the link above) as the main processor in a P2

 

[rohezal]

Not sure what board / cpu they will choose. Maybe it offers USB3.0 or an other bus fast enough. But the fpga idea is the best idea I heard for emulating a co-prozessor / gpu of a console. Or maybe do expensive functions on this chip. It is faster, uses a lot less power and can reprogrammed for each emulator.


But you have know Verilog / VHDL or SystemC for it. Or very simple C code which can be compiled for the fpga (some research is going on in this area).

 

[monstercameron]

thats rite

 

[sswam]

a combined FPGA-ARM chip (as in the link above) as the main processor in a P2

when I saw this topic I thought no way, but now I'm thinking that would be totally awesome

 

[WizardStan]

The FPGA would probably get as much use as the DSP is currently.

 

[Exophase]

Okay, looks like I misunderstand what the OP meant. But I agree with WizardStan on this.. actually I think it'd get less use than the DSP because it needs different tools/languages to use properly. You don't really do HDL in C (or similar); what those conversion tools is supply a set of functions/macros/preprocessing that lets you express the necessary hardware design idioms on top of the standard language ones. So it isn't actually about taking existing code and compiling it for the FPGA.


These SoCs are just too big of a compromise in CPU/peripheral capability vs competitors to make the possible utilization of FPGA fabric worth it.. plus I doubt these are all meant to run in mobile device power envelopes. No good if you can use the FPGA to emulate some console's GPU but then don't have enough CPU power to emulate its CPU..

 

[skeezix]

I've found that reasonably priced FPGAs tend to be slow -- they're very flexible, but you're not getting screaming performance out of them, unless you spend a _lot_ on the FPGA (and then its a big chip as well.) For awhile I thought it would be funky as heck to reflash an FPGA on the fly as needed by an emulator application, and you can do that, and get some pretty handy performance for a CPU emualtor (say), but for somethign like an OpenGL implemented inside an FPGA, you don't get much performance I woudl expect (considering hwo much processing power most of the current common GL chips are hosting..)


ie: Cost of a specific mass market chip is much less than a general purpose chip


But fiddling with an FPGA _is awesome_


jeff

 

[monstercameron]

Oh I founf this on gp32x link here

 

[_wb_]

How do these things perform in terms of power consumption? How much would the extra cost be? I agree that it would probably not get much use, but I for one would be interested in trying to do some hacking with these... also a friend/colleague of mine is working on compiling a (subset of a) very high level programming language directly to FPGA, which is pretty neat if he can get it beyond the proof-of-concept / academic prototype stage it is currently in.

 

[monstercameron]

in the original post there is a link to the zed board, more info might be on their site. pdf link here go to page 20. FOund another from altera cyclone v se link here

here is a project of embedded gpu on opencores

https://www.youtube.com/embed/videoseries?list=UUBJs-ojaXkEnws3lyypOjng

 

[vandyswa]

How do these things perform in terms of power consumption?

In general, FPGA's are *not* known for energy efficiency. All those late-bound HW paths have a very real cost.


I just did a quick scan on the subject, and all I find are energy efficiency discussions WRT other, competing


FPGA offerings.

 

[Exophase]

How do these things perform in terms of power consumption? How much would the extra cost be? I agree that it would probably not get much use, but I for one would be interested in trying to do some hacking with these... also a friend/colleague of mine is working on compiling a (subset of a) very high level programming language directly to FPGA, which is pretty neat if he can get it beyond the proof-of-concept / academic prototype stage it is currently in.

When people say they're compiling a language to an FPGA what they generally mean is they're adapting the language into an HDL (hardware description language) by giving it some kind of augmented functionality. FPGAs aren't processors, you can't compile things to them like you can CPUs. You can try to map the functionality from one to the other but without at least some annotation the result isn't going to be very good.


FPGAs are very poor in area and power efficiency compared to an equivalent (and well optimized) ASIC, but compared to software emulation on a CPU that can win out in power efficiency for some task. However I don't think anyone's going to use FPGA fabric just because it saves a little battery life, they'd probably only use it for things that the CPU is too slow to accomplish.

 

[monstercameron]

found this showing gfx on the fpga...maybe fpga fabris in xilinx zynq could be enough here

https://www.youtube.com/embed/X6MnmQ9iGEM?feature=oembed

it does support android*


http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/operating-systems/index.htm