Future of the CPU board?

[Djoga'Ro]

What’s wrong with ARM? (Genuinely curious)

I've just got a strong preference towards open standards - more commulated experience behind it, less licensing fees involved in production (=> hopefully cheaper product), and maybe that mindset grows and we can have it more modular again (opposed to needing a device tree for every fucking device model), and probably more.

That would me my preferred choice, too. AMD is nice driver and performance wise recently, but as already stated, it has a big package and 6W is already a lot.
The only thing necessary for a RISC-V is an open source graphics card, as the latest cores are already pretty powerful (maybe not as powerful as recent arm, but I would take that if I get a RISC-V based product). Any volunteers to write a hdl model? I would probably try to join in .

I don't know much about that field, but could something like that 4k-core processor Esperanto is working on be used for graphics (with a more complex software stack, maybe)? (Not for the Pyra, but for a silver lining.)

I would love to see an open source graphics card, even if it is just on an FPGA, but the problem with any RISC-V SoC is the cost of a tapeout on the kind of process a Pyra SoC needs - many millions for a proper mask set, hundreds of thousands just for an MPW, not to mention software and engineering time.

Most of the current RISC-V work is either smaller (microcontroller level, or control processor in a larger ASIC) or bigger (massively multicore datacenter/AI type stuff) than a Pyra needs. The only project targeting this space is Libre RISC-V and whether it turns out to be vapourware or not remains to be seen.

I don't think the Pyra must have its very own SoC model. And yes, Risc-V world doesn't have anything fitting, yet.

 

[Grench]

None of the above. Get it going on the OMAP and wait for the -right- SoC to come along. What is -right-?
<=5 W
<=14 nm
64 bit
LPDDR4 or better (more efficient)
2 cores that can dynamically adjust their speed/draw.
Long term production support
Open drivers (no blobs) would be ideal, but we will need to be realistic on this one.

Right now I don't see that in anything but cell phone CPUs that are -worse- than the OMAP5432. As far as 28nm SoC go, that OMAP is still a pretty solid piece of kit.

 

[oskda]

Is being Spectre-free even important these days? With the majority of targets being patched anyways, how many will bother attacking this niche device?
64-bit ARM is neat, but what are the practical advantages for software running on handhelds?

Spectre free is a plus, because patchs don't eliminate bug, only work for some known cases, but with Spectre new forms of attack appear.

Pyra is a niche product, of course, but we will use software not being so niche, for example some web browsers.

64 bit code is more efficient (in most cases). And simply it is standard today.

 

[oskda]

I have high hopes for Risc-V wiping the floor with x86 and ARM in a few years in many (to-me-important) aspects. If beforehand the Pyra gets an upgrade that does away with lots of problems, what incentive would be left to switch again? I don't want my Pyra to be the only device, with which ARM keeps a foot in my door.
Of course, I still may be very wrong about the future of Risc-V.

I love RISC-V possibilities BUT it will take years to start in personal computers (desktop, smartphones...).

I know Si-Five: they have 1st 64 bit RISC-V CPU capable of running modern desktop Linux since Feb 2018 (HiFive Unleashed, a development board with a 64-bit SoC with four U54 cores). Well, we are in May 2020 and:

1. No board for normal market, normal price (this SBC cost more than 600$; It is for developers).

2. It advances but Linux support is still far from complete. More work/time is needed.

3. This board has no GPU (nor integrated video). There is a problem: we will have open CPU but no open GPU.

It may be Pyra needs a new CPU much before RISC-V be ready for Pyra CPU upgrade. It coukdw be RISC-V be ready not for 1st CPU upgrade, but for 2nd or even later upgrade.

When we see RISC-V SBC like RPi (with integrated GPU/etc), it will take years to have possibilities to have that SOC in Pyra.

PD: For newcomers: RISC-V architecture is libre, but so much libre that it can be totally close, as anyone using it can decide, and they will close its product. I.e. most RISC-V CPUs will be closed. Of course we love it for that freedom.

 

[Phlyra]

I've just got a strong preference towards open standards - more commulated experience behind it, less licensing fees involved in production (=> hopefully cheaper product), and maybe that mindset grows and we can have it more modular again (opposed to needing a device tree for every fucking device model), and probably more.
I don't know much about that field, but could something like that 4k-core processor Esperanto is working on be used for graphics (with a more complex software stack, maybe)? (Not for the Pyra, but for a silver lining.)
I don't think the Pyra must have its very own SoC model. And yes, Risc-V world doesn't have anything fitting, yet.

Ahh for some reason I got my wires crossed and thought that ARM was open source
Yeah I can see why RISC-V would be preferable from that point of view!

 

[daveshah]

1. No board for normal market, normal price (this SBC cost more than 600$; It is for developers).

I've heard SiFive are making a massive loss at that price point too, because their aim is to attract developers to the ecosystem rather than make money selling SBCs (their main business is selling RISC-V and associated IP) - I think this goes to show the cost of low volume silicon.

 

[levi]

Ahh for some reason I got my wires crossed and thought that ARM was open source
Yeah I can see why RISC-V would be preferable from that point of view!

Well ARM docs are generally available for a specific core are available generally about a year after the docs are released to subscribers, and the instruction set for armv8 has been freely available since at least 2013, which is all most application developers need (the specific TRMs are mainly for people porting OSes to those chips I assume).

The benefits of open hardware do mean that as a user you can inspect the layout of the chip, and if you understand that you can check that it doesn't contain any secret modes or undefined ops, and if you're really clever you can also check it against race conditions and side channel leaks, but for most people the main benefit is that you can get the layout gratis, and then take it forward to a chip fabricator to be made for any number of millions of dollars, same as if you had licensed a design from ARM. But as a real end user you can't actually prove that the chip you buy only contains the open source layouts and not some secret squirrel hacky bits that work to subvert our code without pretty much the exact same work you'd need to do as a user of an ARM-based chip to prove the same, except that at the present time I'd say it's pretty much guaranteed that most ARM-based chips will have poorly documented secret squirrel bits in them, while RISC-V ones are unlikely to. But if RISC-V takes off and is made into chips by the same companies that today make ARM chips I'd expect them to put very similar secret squirrel bits in also.,

 

[Djoga'Ro]

When we see RISC-V SBC like RPi (with integrated GPU/etc), it will take years to have possibilities to have that SOC in Pyra.

Why would the manufacturer of a SoC with a convincing SBC choose to not sell it for several years?

RISC-V architecture is libre, but so much libre that it can be totally close, as anyone using it can decide, and they will close its product. I.e. most RISC-V CPUs will be closed.

Who cares. Don't try to convince me, that there are no developers out there, who would love to create open SoCs and CPUs. With RISC-V there's an ISA that'll most likely have users, there'll be compilers already, and every product designer that has to mind costs would have a strong incentive to choose them. And, it (SoC/CPU designs they come up with) being open source means, no one developer would have to do it on his/her own.

 

[Letalis Sonus]

The benefits of open hardware do mean that as a user you can inspect the layout of the chip

I'd guess you're underestimating the grade of abstraction between a chip's design and its actual die and overestimating the possibilities of reverse engineering the chip enough to compare them.

There's plenty of much less obvious and much more accessible possibilities of including backdoors through the company that manufactures the dies, like the network components directly included in the SoC. A silicon die is still a big black box, even for the engineer that developed the chip design it implements. You just narrow down the amount of untrustworthy peers, it is impossible to get rid of them if you can't manufacture them yourself.

 

[levi]

I did qualify that with an 'if you can understand it' before you'd get any concrete results from such an activity.

 

[pmprog]

Came across these when browsing, don't know if they're any potential use?

Libre RISC-V M-Class

A 100% libre RISC-V + 3D GPU chip for mobile devices

www.crowdsupply.com

Open-V

The World's First Open Source RISC-V-based 32-bit μC

www.crowdsupply.com

 

[docbroke]

IIT ( Indian Institute of Technology) India is also developing open source processors named Shakti

 

[Askarus]

Even if there is a fully opens source architecture, I would stick to ARM as long as there is no good support for the other architecture.
How useful is RISC or whatever if emulators and software packages are optimized for ARM and AMD?
I don't mind closed source drivers as long as they work.
Of course closed source stuff leads to problems as we see with out TILER and GPU.
But using something unknown yould be even worse I think.

 

[daveshah]

Open-V is a small 32-bit CPU, more suited to something like an Arduino.

Libre RISC-V is more suited to the Pyra use case but might be some time away. It also seems like it will actually be POWER (but also an open architecture) rather than RISC-V due to some kind of disagreement. And its performance is almost certainly significantly behind the OMAP5 although maybe enough people would care about an open device to be OK with that.

 

[Djoga'Ro]

Libre RISC-V is more suited to the Pyra use case but might be some time away. It also seems like it will actually be POWER (but also an open architecture) rather than RISC-V due to some kind of disagreement. And its performance is almost certainly significantly behind the OMAP5 although maybe enough people would care about an open device to be OK with that.

I take it as a proof of concept - competitive ones are just a matter of time.

 

[Kev2442]

Just learned about Ryzen C7, looks promising as well.
Hasn't @EvilDragon been in talks with AMD a few years ago ?

 

[levi]

Can you link to more information? Searching for 'ryzen c7' just gets me desktop oriented amd parts at present. To begin with you need to check TDP and package size.

 

[RZR]

Can you link to more information? Searching for 'ryzen c7' just gets me desktop oriented amd parts at present. To begin with you need to check TDP and package size.

I guess he's talking about this leak:

AMD "Ryzen C7" Smartphone SoC Specifications Listed

Last year Samsung and AMD announced their collaboration which promises to deliver smartphone chips with AMD RDNA 2 graphics at its heart. This collaboration is set to deliver first products sometime at the beginning of 2021 when Samsung will likely utilize new SoCs in their smartphones. In...

www.techpowerup.com

 

[Askarus]

I guess he's talking about this leak:

AMD "Ryzen C7" Smartphone SoC Specifications Listed

Last year Samsung and AMD announced their collaboration which promises to deliver smartphone chips with AMD RDNA 2 graphics at its heart. This collaboration is set to deliver first products sometime at the beginning of 2021 when Samsung will likely utilize new SoCs in their smartphones. In...

www.techpowerup.com

That one sounds really nice.
Depends on how good the support is, how available the SoC will be and if it fits into our tiny space.

 

[Kev2442]

Indeed. Sorry I didn't reply earlier @levi and all, not being quoted nor tagged makes it a bit difficult getting notified without checking the topic yourself
Of course this is "promising" as in "promises"... we don't know anything for sure yet. But as it is smartphone-oriented we can reasonably hope for something small enough and which at the very least could be downclocked to useable temperatures.