i hate to sound like somebody who has to bring common sense to a thread, but:
the clocking of VLSIs has been about realiability. or IOW, your bits meeting expectations, doing exactly what they're support to do while traversing the circuit. i grin each time somebody comes up with 'what's the worst that can happen when i up the clock (but leave the voltages) - a crash at most' - i don't know about you, but i don't look at random crashes lightly. and as a software guy i would direct any stability reports about my software, coming from overclocked systems, rigth down to /dev/null.
btw, i'm a software guy, but i happen to work at a company that makes embedded devices (custom PCBs, custom enclosures, etc). a lot of time and effort is spent here to ensure TDPs are rigidly met, and the consumer can run the device the advertised way (i.e. 24/7, in unfavorable ambient t environments).
i know the prevailing mentality on these boards is 'hey, as long as i can run emu X at fps Y for limited time before it crashes, i'm good', but i don't share that mentality - for me the pandora is a linuxbox that will be treated as any other - it will have to be able to run tasks reliablty for the whole duration of the battery charge. and then again on the next day, and on the next, etc, while travelling with me to locations of diverse t conditions. if TI say that OPP3 goes as high as 600MHz (reliably) for pandora's omap, and that's the recommended OPP for everyday usage and normal lifespan, then that's what my pandora will be run at, and what my sw will be targeted at.