Quake Video

[jlebrech]

1 cpu to do the Matrix math and Z-sorting, and the other one for filling in the polygons.

http://www.gamedev.net/reference/articles/article877.asp

and for polygon redering im sure you can do a 2d scaling on the triangles vectors inwards as you draw the edges. that should fill in the polygon.

 

[DJWillis]

Woogal,

Very, very cool to see this all comming together .

 

[DaveC]

Davec : There is no need for both cpu's to be accessing memory at the same time. A second cpu is used to perform some task to free up the first cpu - they don't try and both do the same task together. As a real world example, think of the first cpu as someone doing the washing up, and the second as someone drying. The first cpu washes and puts the dishes to one side ready for the second cpu to put them up. The second cpu sits there waiting, then when a dish comes along it drys it and puts it away, leaving the first cpu free to wash something else. They never try and do something with the same dish as the same time. Just look at what skeezix wrote 'copy the polygon display lists and such over to another buffer and kick off the second cpu to do the rendering'. All the second cpu would do is pick up the data and render it. Once the first cpu has given the data away it doesn't care about it anymore.

​

In your example though wouldn't it be while the second CPU is putting the dish away the first couldn't wash until the second was done putting away? In other words both CPUs cant be accessing memory at the same time. While one is working the second must wait and visa versa. This would mean that still only one CPU is doing something at once and not both processing in parallel. That means that you really only have 200 MHz of processing at one time, not 2 x 200 MHz processing at once, unless you use the cache but the cache is so small.

 

[DaveC]

Cant you just stfu davec?
You are the most annoying guy on the forum, makeing the same statements 523957392 times a day and ignoring any responses that say otherwise.

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That is a real constructive post, now go fuck yourself..

 

[craigix]

So DaveC, why do you think magiceyes made this dual core set up then, if it does not work? You obviously know more than them, so do tell us.

 

[don]

DaveC for president.

 

[woogal]

In your example though wouldn't it be while the second CPU is putting the dish away the first couldn't wash until the second was done putting away? In other words both CPUs cant be accessing memory at the same time. While one is working the second must wait and visa versa. This would mean that still only one CPU is doing something at once and not both processing in parallel. That means that you really only have 200 MHz of processing at one time, not 2 x 200 MHz processing at once, unless you use the cache but the cache is so small.

​

I've gave that example for a very good reason - it's how the cpu's work. Why on earth would the first cpu have to wait before doing another task? The second cpu is working with the data it's been given, the first cpu is preparing the next bit of data. The two bits of data are different.

 

[Empyre]

In your example though wouldn't it be while the second CPU is putting the dish away the first couldn't wash until the second was done putting away? In other words both CPUs cant be accessing memory at the same time. While one is working the second must wait and visa versa. This would mean that still only one CPU is doing something at once and not both processing in parallel. That means that you really only have 200 MHz of processing at one time, not 2 x 200 MHz processing at once, unless you use the cache but the cache is so small.

​

No
The 2 CPU's can't access the _same_ memory at the same time. If the second cpu was drying the plate and putting it away the first cpu couldn't grab the plate back and rewash it cos it missed a spot.

I think...

 

[DaveC]

In I've gave that example for a very good reason - it's how the cpu's work. Why on earth would the first cpu have to wait before doing another task? The second cpu is working with the data it's been given, the first cpu is preparing the next bit of data. The two bits of data are different.

​

If both CPUs can't be accessing memory at the same time and the second CPU is now doing something with the data set up by the first one in memory wouldn't the first have to wait until the second is done acessing before it could continue processing which means changing contents of memory? If the first cpu could continue processing while the second is processing they would have to both be accessing memory at the same time and Squidge said that can't be done (not including the caches which can be used by their own cores, but they are small) .

And to the flamers, I am just trying to figure out how this works, relax.

 

[DaveC]

So DaveC, why do you think magiceyes made this dual core set up then, if it does not work? You obviously know more than them, so do tell us.

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I am sure it works for what they intended it to do. I am just not sure how it works for what we want which is games, ports and emus. Wasn't this chip made more for video and audio media devices like PMPs, MP3 players etc? I am not saying it doesn't work I am just trying to guage it's power for our uses.

 

[Empyre]

If both CPUs can't be accessing memory at the same time and the second CPU is now doing something with the data set up by the first one in memory wouldn't the first have to wait until the second is done acessing before it could continue processing which means changing contents of memory? If the first cpu could continue processing while the second is processing they would have to both be accessing memory at the same time and Squidge said that can't be done (not including the caches which can be used by their own cores, but they are small) .

And to the flamers, I am just trying to figure out how this works, relax.

​

Both CPU's cant be accessing the same memory, of course they can both access memory at the same time just not the same bit.

 

[Gruntfuggly]

The first CPU wants to pass the memory over, it copies the original area of memory to another place so that the second CPU can work on it there and delete it when it's finished.

 

[DaveC]

If both CPUs can't be accessing memory at the same time and the second CPU is now doing something with the data set up by the first one in memory wouldn't the first have to wait until the second is done acessing before it could continue processing which means changing contents of memory?  If the first cpu could continue processing while the second is processing they would have to both be accessing memory at the same time and Squidge said that can't be done (not including the caches which can be used by their own cores, but they are small) .

And to the flamers, I am just trying to figure out how this works, relax.

​

Both CPU's cant be accessing the same memory, of course they can both access memory at the same time just not the same bit.

​

Are you sure? Squidge from the below thread says no. He has a dev kit and is programming it so he should know. Notice how he just says "memory" not "same memory". This is where this whole thing came from.

http://www.gp32x.de/board/index.php?showtopic=21741&st=0

"Memory can only be accessed by one core at a time, so devvers need to make good use of the cache. "

 

[Cyclops]

The 2 CPU's can't access the _same_ memory at the same time. If the second cpu was drying the plate and putting it away the first cpu couldn't grab the plate back and rewash it cos it missed a spot.

I think...

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LOL I had to sit through examples of stuff involving knitting of a jumper years ago. *shakes head* And they say computings a boys club.

 

[Empyre]

Are you sure? Squidge from the below thread says no. He has a dev kit and is programming it so he should know. Notice how he just says "memory" not "same memory". This is where this whole thing came from.

http://www.gp32x.de/board/index.php?showtopic=21741&st=0

"Memory can only be accessed by one core at a time, so devvers need to make good use of the cache. "

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Yeah I'm sure.

MiniMoose: Linux only see's one processor, if you want to use the second processor, you have to copy your code (which should be compiled to run at address 0) into a physical page in memory that linux does not have access to, setup the control register and then just let it run. You can't use malloc()'d memory, as user apps will not know the physical address for this memory, and the memory may be split up and not actually allocated due to Linux's copy-on-write technique. However, upon bootup, 17MB of physical RAM is dedicated to the second processor at a fixed address (0x02000000 onwards), which should be enough for most purposes.

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Knew I'd seen it somewhere.

 

[theoddbot]

It just means they can't both be accessing memory on the same clock cycle. If both try to read something, the second core will block until the first one finished. I doubt even 50% of instructions involve hitting the memory, so there's nothing really to be worried about.

Re: the 17mb, it's 17mb that Linux ignores so that the 940t has exclusive access to it. It still can't hit the memory on the same clock as the 920t.

This really isn't a big deal people, calm down a little.

 

[Eolair]

Maybe this will help...or not (taken from the MP2520F data book):

"The DRAM and NON-DRAM memory bus controllers have sixteen level individual command & data write buffer in order to enable all nine memory bus masters to access either external DRAM or Non-DRAM memory devices in burst and pipelined operation mode (without having to wait for its and/or other memory bus masters' data to be completely written to external memory)."

 

[DaveC]

It just means they can't both be accessing memory on the same clock cycle. If both try to read something, the second core will block until the first one finished. I doubt even 50% of instructions involve hitting the memory, so there's nothing really to be worried about.

This really isn't a big deal people, calm down a little.

​

Ok, that takes some of the confusion out. The cache could help it a bit too for some small loops of code I suppose.

 

[Oscaruzzo]

Ok, that takes some of the confusion out. The cache could help it a bit too for some small loops of code I suppose.

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You should consider that usually most code operates on registers, not on memory. That's one of the main objectives of an optimizing compiler.

 

[reallynotnick]

Too bad about that whole PPC nonsense reallynotnick ;-) My linux machine plays the video (though sadly without sound, and can't convert it to anything).

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Am I the only one that gets driven insain when people say PPC (Pocket PC) and then I think they are talking about PPC (Power PC). Sure I understood that sentence above.

Look on the bright side we (Apple) are switching over now that Intel is getting some kick ass chips in 2006!


Well on topic, thanks to who converted it! Plays fine now.
Looks great can't wait to get this on my gp2x when it comes it the mail, and will egarly await everupdate.

PS. Your original video does not work any more.