Pandora, Some Actual Performance Numbers ..

[mali]

Quote from ITT
Benchmarking Quake 2 on N8x0:
QUOTE
Running 'maqii +set basedir /media/mmc2/quetoo +set timedemo 1 +set vid_width 320 +set vid_height 240 +map demo2.dm2' gives me '618 frames, 35.5 seconds: 17.4 fps' and with '+set vid_width 400 +set vid_height 240' that matches the aspect on the n8x0 screen, and is default in my launcher gives '618 frames, 40.6 seconds: 15.2 fps'. I do think the zaurus has a bit better cpu, though I don't really know. I couldn't find any very good info on either zaurus or a q2 port for it either. Any optimzations that might have could probably benefit this too, so any info on this would be nice.

 

[Creature XL]

QUOTE
Has someone tried to use an ARM compiler for nBench, yet?

Are you ready to pay several thousand dollars for a compiler?

Not necessary
It COULD be that some HAS the compiler at work.
A friend of mine bought a license for some month because he had to test ARM code for an university project.
Bad thing is, this was a year ago or something. But it COULD be that someone here as a similiar oppurtunity.

 

[mali]

I've read on IRC log, that TI has got an own NEON compiler that should be even better than the ARM one. So far I haven't read someone trying it out. I've read this also:
[10:17:45] <mru> transferring a 32-bit value from neon to an arm register takes something like 20 cycles
[10:18:14] <mru> the arm and neon pipelines are not tightly coupled

Edit:
<mru> arm to neon register transfer is fast
[14:03:48] <mru> neon to arm is slow
[14:04:01] <torus> good to know..
[14:04:42] <mru> remember there's 16-entry instruction fifo between arm and neon
[14:05:18] <mru> so if you have some arm code to run, clever interleaving with neon instructions lets both execute at the same time
Edit:
[14:18:03] <mru> to get maximum performance from neon, you need to use the full register width
[14:18:10] <mru> and avoid neon to arm register transfers
Edit:
http://pandorawiki.org/Hardware_documentation
Edit:
As a side note, NEON is likely to lock up the CPU when you overclock(core voltage dependent).
Edit:
mru suggests RVDS 4.0 but he says, that it's not fully GCC compatible and has bugs, too. There is a 30 day trial available if you register.
Edit:
[19:46:55] <geist> and we have full -mcpu=cortex-a8 + neon turned on
[19:47:07] <mru> which version?
[19:47:14] <geist> 2007q3 mostly
[19:47:27] <mru> that doesn't use neon at all
[19:47:30] <mru> only vfp
Edit:
[19:53:19] <mru> expect 10-15% faster code from armcc
Edit:
A more off topic note: Cortex A9 will have a pipelined VFP unit.
Edit:
http://www.arm.com/pdfs/TigerWhitepaperFinal.pdf