The A53 seems quite old hat now; it was one of the first A64 layouts announced as far as I know.
One reason to favour it is that it's one of the few 64-bit chips that doesn't do out of order execution, although it still does branch prediction in some cases, so it might still be subject to some of these speculative execution attacks like spectre.
In terms of bang per buck you get about half the work done per tick compared to an A57 or something newer. It's actually slower than each A15 core, especially as it's clocked slower in this configuration.
I'm not convinced this is the CPU board you are looking for.
Er, the linked article in the OP says it's coming in 2 or 4 core packages. If we have suitably parallisable software, it might be comparable to the OMAP5, but for single threaded processes it's going to suck badly. But it may well use less power being built on a smaller process, so perhaps it's worth tracking as a sidegrade if not an actual upgrade.
In terms of making a CPU board for this, do Aarch64 chips require 64 address lines to be laid out? I've just downloaded some TRMs but they don't seem to document such basic electronic considerations, at least not in a format I can understand.
Sure it does; I guess they would never implement something that doesn't give results @TrashyMG : I know, that's why i figured if this SoC's PowerVR was only one-core, it would confirm the chip as mostly slower than the OMAP5. I was asking if the 2/4 core of this 64b CPU also meant the same for its graphics part.
I guess we'll find out if we don't know already from the devboard, but I assumed the way TI made SoCs meant the graphics chip was drivable from any core. It's highly unusable to talk about graphics chips being multicore by the way; since they're already hundreds of parallised little processors running together, the only common metrics for speed are the width of that set and its clock speed, commonly translated into triangles per second or something more human readable.
Well, the OMAP5 is still one of the better SoCs we can use right now.
The iMX might be a candidate in the future, but one issue is that most SoCs don't really support Linux that well.
I found that out with the Gemini: While Android runs great on that MediaTek SoC, Linux is performing worse than on the Pyra.
The kernel is outdated (and can't be updated thanks to MediaTek) and as the screen is more than FullHD and no hardware accelleration can't be used, stuff like LibreOffice crawls slower than on the Pandora...
So yeah, we should keep our eyes open for newer SoCs, but we also need to be aware of the Linux support (and even though a lot of OMAP5 stuff is unfinished in the kernel, it's open and we can add these things ourselves and use modern kernels as well).
Yes, TI being a little more oldschool have more engineers interested in getting linux working on their chips, although the experience on the mailing list shows that it really took the development of a real device using that chip to get people motivated to make everything work and keep it working on stable kernels (although without those real engineers supporting our team, I guess we might have been stuck a way back too, so you need both parties in the end).
Maybe that would play out with other companies too though, if people are actually keen on getting linux working and up to date then they might also be willing to share their experience with the team, although mediatek's response to the gemini porters doesn't suggest they're a supportive engineering team I guess.