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Should the frequency of the Pyra memory bus be so close to maximum for CL=7?

Discussion in 'Ask EvilDragon Questions' started by Pyramancer, Sep 18, 2017.

  1. Pyramancer

    Pyramancer Active Member

    Joined:
    Feb 4, 2017
    Messages:
    124
    Hi Michael,

    With regard to recent postings on the kernel list, as follows:

    At 08:40 +0200 on Wednesday 2017-09-13, Matthijs van Duin wrote:
    >
    > We're running the memory bus at 532 MHz, i.e. tCK = 1.88 ns.

    At 06:03 +0200 on Monday 2017-09-18, Matthijs van Duin wrote:
    >
    > DDR3-1066 only has E (CL=6), F (CL=7), and G (CL=8) as
    > JEDEC-specified bins.
    >
    > The timings are often also specified as 6-6-6 / 7-7-7 / 8-8-8, which
    > refer to CL, nRCD and nRP.

    At 06:03 +0200 on Monday 2017-09-18, Matthijs van Duin wrote:
    >
    > For our memory that's the DDR3-1066F bin, which means it supports
    > 7-7-7 timings (which we're using).​

    I am wondering if we need to run the memory bus clock so fast, so close to the maximum for the bin?

    With CL = 7 the range is (400, 533 1/3] MHz according to the K4B8G1646D datasheet. 532 MHz seems very close to the top edge.

    What happens if you back it off 5% from the bin edge and run the clock at 507 MHz or so?

    Or kick the clock up to around 561 MHz (if the board / processor will support it) and use the next bin (533 1/3, 666 2/3] MHz with CL = 9? (Although, according to Matthijs's post, that's not JEDEC standardised.)

    [I didn't want to clutter up the kernel list with this question. Posting it here you can respond to it or ignore it as and when you have a moment.]

    Thanks.
     
    Last edited: Sep 18, 2017
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    ClockworkCoder likes this.
  2. EvilDragon

    EvilDragon Administrator Staff Member

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    Well, that would exactly be a question for the kernel mailing list, so you can ask it there :)
    zmatt knows a lot about memory, I don't :)

    I'm just trying to read datasheets :)
     
  3. OppositeDay

    OppositeDay Still Fresh

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    I'd just copy and paste this post there, it doesn't need to be formatted beautifully as long as it's readable.
     
    Last edited: Sep 18, 2017
  4. comradekingu

    comradekingu Glowing ember

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    It is perfectly fine to overclock memory so long as it works. Faster is better, no argument there.
    Running it within what is permitted by SPD values is getting what you paid for, not cheating out some extra. Does not deteriorate the chips over time.
    I would be worried if the voltage was above spec. You pay for that in battery life, and potential disaster.

    Edit: There is a penalty to taking a chance on overclocking out of the box that seems not worth it. Even with just a pure speed increase, it might provoke instability in rare cases, or for some of the many chips out in the wild.
     
  5. Pyramancer

    Pyramancer Active Member

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    I don't think there's been any suggestion of overclocking. The memory chips in question support a much faster clock -- up to 800 MHz.
     
  6. levi

    levi Still fresh, damnit!

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    Perhaps, but only with a different (higher?) CL value. We're currently running with CL=7 according to the OP, and we're near the maximum of the range specified by that. You can't get to 800MHz with CL=7, it says.

    But yeah, this isn't overclocking, but it is running close to the boundary, and since we have problems with stability with the larger RAM chips, it may be worth investigating that if it's not been done already.
     

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