Sdl Version Of Visual Boy Advanced


About the compatibility problems, i believe they are related to the way you implemented the *S e.g. MOVS, SUBS, .... from looking at the code you put in for those functions i can see why theres a compatibility issue, the code makes no sense to me, replace the *S opcodes with the C_FLAG and such under the non *S asm code and it should work as expected
 
Normmatt posted on Nov 4 2006 said:
About the compatibility problems, i believe they are related to the way you implemented the *S e.g. MOVS, SUBS, .... from looking at the code you put in for those functions i can see why theres a compatibility issue, the code makes no sense to me, replace the *S opcodes with the C_FLAG and such under the non *S asm code and it should work as expected
Click to expand...
I'm not confident about these as well.
#define LOGICAL_LSL_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
C_OUT = (v >> (32 - shift)) & 1 ? true : false;\
value = v << shift;\
}
#define LOGICAL_LSR_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
C_OUT = (v >> (shift - 1)) & 1 ? true : false;\
value = v >> shift;\
}
#define LOGICAL_ASR_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
C_OUT = ((s32)v >> (int)(shift - 1)) & 1 ? true : false;\
value = (s32)v >> (int)shift;\
}
#define LOGICAL_ROR_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
C_OUT = (v >> (shift - 1)) & 1 ? true : false;\
value = ((v << (32 - shift)) |\
(v >> shift));\
}
#define LOGICAL_RRX_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
shift = (int)C_FLAG;\
C_OUT = (v & 1) ? true : false;\
value = ((v >> 1) |\
(shift << 31));\
}
#define LOGICAL_ROR_IMM \
{\
u32 v = opcode & 0xff;\
C_OUT = (v >> (shift - 1)) & 1 ? true : false;\
value = ((v << (32 - shift)) |\
(v >> shift));\
}
#define ARITHMETIC_LSL_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
value = v << shift;\
}
#define ARITHMETIC_LSR_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
value = v >> shift;\
}
#define ARITHMETIC_ASR_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
value = (s32)v >> (int)shift;\
}
#define ARITHMETIC_ROR_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
value = ((v << (32 - shift)) |\
(v >> shift));\
}
#define ARITHMETIC_RRX_REG \
{\
u32 v = reg[opcode & 0x0f].I;\
shift = (int)C_FLAG;\
value = ((v >> 1) |\
(shift << 31));\
}
#define ARITHMETIC_ROR_IMM \
{\
u32 v = opcode & 0xff;\
value = ((v << (32 - shift)) |\
(v >> shift));\
}
#define ROR_IMM_MSR \
{\
u32 v = opcode & 0xff;\
value = ((v << (32 - shift)) |\
(v >> shift));\
}
#define ROR_VALUE \
{\
value = ((value << (32 - shift)) |\
(value >> shift));\
}
#define RCR_VALUE \
{\
shift = (int)C_FLAG;\
value = ((value >> 1) |\
(shift << 31));\
}
/*
#define LOGICAL_LSL_REG \
{\
asm("mov %0, %2,lsl %3\n" \
"mrs r0,cpsr\n"\
"mov r0,r0,lsr#29\n"\
"and %1,r0,#1\n"\
:"=r" (value),"=r"(C_OUT)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define LOGICAL_LSR_REG \
{\
asm("mov %0, %2,lsr %3\n" \
"mrs r0,cpsr\n"\
"mov r0,r0,lsr#29\n"\
"and %1,r0,#1\n"\
:"=r" (value),"=r"(C_OUT)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define LOGICAL_ASR_REG \
{\
asm("mov %0, %2,asr %3\n" \
"mrs r0,cpsr\n"\
"mov r0,r0,lsr#29\n"\
"and %1,r0,#1\n"\
:"=r" (value),"=r"(C_OUT)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define LOGICAL_ROR_REG \
{\
asm("mov %0, %2,ror %3\n" \
"mrs r0,cpsr\n"\
"mov r0,r0,lsr#29\n"\
"and %1,r0,#1\n"\
:"=r" (value),"=r"(C_OUT)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define LOGICAL_RRX_REG \
{\
asm("mov r0,%3,lsl#29\n"\
"msr cpsr,r0\n"\
"mov %0, %2,rrx\n" \
"mrs r0,cpsr\n"\
"mov r0,r0,lsr#29\n"\
"and %1,r0,#1\n"\
:"=r" (value),"=r"(C_OUT)\
:"r" (reg[opcode & 0x0f].I),"r"(C_FLAG): "r0","r1","r2","r3" );}

#define LOGICAL_ROR_IMM \
{\
asm("mov %0, %2,ror %3\n" \
"mrs r0,cpsr\n"\
"mov r1,r0,lsr#29\n"\
"and %1,r1,#1\n"\
:"=r" (value),"=r"(C_OUT)\
:"r" (opcode & 0xff),"r"(shift): "r0","r1","r2","r3" );}

#define ARITHMETIC_LSL_REG \
{\
asm("mov %0, %1,lsl %2\n" \
:"=r" (value)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define ARITHMETIC_LSR_REG \
{\
asm("mov %0, %1,lsr %2\n" \
:"=r" (value)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define ARITHMETIC_ASR_REG \
{\
asm("mov %0, %1,asr %2\n" \
:"=r" (value)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define ARITHMETIC_ROR_REG \
{\
asm("mov %0, %1,ror %2\n" \
:"=r" (value)\
:"r" (reg[opcode & 0x0f].I),"r"(shift): "r0","r1","r2","r3" );}

#define ARITHMETIC_RRX_REG \
{\
asm("mov r0,%2,lsl#29\n"\
"msr cpsr,r0\n"\
"mov %0, %1,rrx\n" \
:"=r" (value)\
:"r" (reg[opcode & 0x0f].I),"r"(C_FLAG): "r0","r1","r2","r3" );}

#define ARITHMETIC_ROR_IMM \
{\
asm("mov %0, %1,ror %2\n" \
:"=r" (value)\
:"r" (opcode & 0xff),"r"(shift): "r0","r1","r2","r3" );}

#define ROR_IMM_MSR \
{\
asm("mov %0, %1,ror %2\n" \
:"=r" (value)\
:"r" (opcode & 0xff),"r"(shift): "r0","r1","r2","r3" );}

#define ROR_VALUE \
{\
asm("mov %0, %0,ror %1\n" \
:"=r" (value)\
:"r"(shift): "r0","r1","r2","r3" );}

#define RCR_VALUE \
{\
asm("mov r0,%1,lsl#29\n"\
"msr cpsr,r0\n"\
"mov %0, %0,rrx\n" \
:"=r" (value)\
:"r"(C_FLAG): "r0","r1","r2","r3" );}
*/
 
Last edited by a moderator:
Normmatt posted on Nov 4 2006 said:
About the compatibility problems, i believe they are related to the way you implemented the *S e.g. MOVS, SUBS, .... from looking at the code you put in for those functions i can see why theres a compatibility issue, the code makes no sense to me, replace the *S opcodes with the C_FLAG and such under the non *S asm code and it should work as expected
Click to expand...
Code: 
#define OP_SBCS \
	{\
	  asm("mov r0,%3,lsl#29\n"\  set bit 29 in R0 based on C_FLAG
	  "msr cpsr,r0\n"\  copy into the status register
	  "sbcs %0,%5,%6\n"\ subtract with carry
	  "mrs r0,cpsr\n"\ copy status register into R0
	  "mov r1,r0,lsr#30\n"\ extract Z_FLAG
	  "and %1,r1,#1\n"\
	  "mov r1,r0,lsr#31\n"\ extract N_FLAG
	  "and %2,r1,#1\n"\
	  "mov r1,r0,lsr#29\n"\ extract C_FLAG
	  "and %3,r1,#1\n"\
	  "mov r1,r0,lsr#28\n"\ extract V_FLAG
	  "and %4,r1,#1\n"\
	  :"=r" (reg[dest].I),"=r" (Z_FLAG),"=r"(N_FLAG), "=r"(C_FLAG),"=r" (V_FLAG)\
	  :"r" (reg[base].I), "r" (value) : "r0","r1","r2","r3" );}
It seems to work actually. the problem seems to be in the rotation part based on recent feedback.
 
Last edited by a moderator:
Last edited by a moderator:
I managed to get vba2x to compile with devkitgp2x. If anyone is interested, I can e-mail the src to you. I'm quite busy over the next two months so I hope someone else can take over this.(Also I'm out of ideas)
 
getting it to compile and work are two different things, so does it work or did you just get it to compile?
 
Normmatt posted on Nov 9 2006 said:
getting it to compile and work are two different things, so does it work or did you just get it to compile?
Click to expand...
It runs on the gp2x if that's what you mean, but I' afraid I messed things up further so now its compatibility is very bad and also slower than before.
 
Last edited by a moderator:
got the speed back up again but compatibility problem is still there. I think there is a problem with c_out. I just deleted it cause I thought it was useless. I now think that it matters when doing rotations otherwise the c_flag is not set properly.
I'm going to use devkitgp2x on windows from now on as guess more people use it than linux or andlinux.
 
uploaded version q.5 it should compile on devkitgp2x O2 optimization. O3 takes too long to compile but should work as well
 
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