It can handle more via enable lines externally from the SoC but i don`t remember where the exact specs are i thnk MWeston cleared that up when i asked awhile back... in the dev forum iirc
I think up to 1Gb on SoC + 1Gb is possible to add externally if you have the appopriate interfacing HW which isn't built on the pandora board
CODE
http://focus.ti.com/docs/prod/folders/print/omap3530.html
CODE
External Memory Interfaces: 
    * SDRAM Controller (SDRC)
          o 16, 32-bit Memory Controller With 1G-Byte Total Address Space
          o Interfaces to Low-Power Double Data Rate (LPDDR) SDRAM
          o SDRAM Memory Scheduler (SMS) and Rotation Engine
    * General Purpose Memory Controller (GPMC)
          o 16-bit Wide Multiplexed Address/Data Bus
          o Up to 8 Chip Select Pins With 128M-Byte Address Space per Chip Select Pin
          o Glueless Interface to NOR Flash, NAND Flash (With ECC Hamming Code Calculation), SRAM and Pseudo-SRAM
take that with a grain of salt until someone that actually knows can explain it or has a fast enough internet connection to find the post where it was explained
The Pandora has 256Mb ram and 512 Flash.. period end of story and at 256Mb it is a HUGE amount for an embedded device
Edit: extensively edited by me 
