Creative Zii Could It Be Used For The Pandora Platform?

[lodoss118]

I just checked out what the creative zii is:

Each ZMS-05 SoC has dual ARM-926 cores with 48 programmable processor elements (PE) churning out 10GFlops of processing power. The chip is able to re-program itself in real-time to suit the needs of the application being executed, so there's probably a software stack on top controlling the PEs.

In addition, the Zii chip has the ability to shut down unused PEs and wake them up when necessary, thus saving power. For instance, more PEs will be activated when performing intensive tasks such as playing 3D games or playing back HD videos.
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Do you think this can be pandora's next hardware platform?

 

[WoD]

And all they can make with the Zii is a crappy PMP! Guess it's not quite as good as they're making it out to be, hmmmmm!

 

[sindbad]

Actually the Zii has great potential. It's basically an ARM core with an FPGA array tacked on instead of a DSP.

This makes it much more flexible than ARM+DSP, but has the problem of established software. People will also have to learn Verilog or some other such language and even C is too much to bother with these days.

It needs a very good open source software stack and SDK that can provide an easy transition from more traditional programming techniques.

 

[Gautama]

It needs a very good open source software stack and SDK that can provide an easy transition from more traditional programming techniques.

That sure sounds like Creative :rolleyes:

 

[cb88]

you do NOT program FPGAs you configure them. (if you try to program one mutant monkies will come out and eat you or something)

any computer or electrical engineer should be able to do that ... it doesn't happen to be one of those things that makes it into many Comp Sci degrees though so programmers are SOL

Computer Engineers willl rule the world!!! muahhahahah

j/k

 

[sindbad]

any computer or electrical engineer should be able to do that ... it doesn't happen to be one of those things that makes it into many Comp Sci degrees though so programmers are SOL

Computer Engineers willl rule the world!!! muahhahahah
Maybe . But I have a lot of hope in projects like MyHDL, which would significantly lower the learning curve for programmers.

 

[DCillusion]

It's just something called "chaos computing". Luckily, it's not a Creative patent. The Cell processor is a hybridized form of this. Hopefully, someone could make something good with this. As for Creative, they might have, just as well, put this in a digital photo frame for all the good they did with it.

Since we're talking random technology. It was talked about on the forums that we couldn't have a "slider" keyboard due to patent liability. RIM just got around this by putting a trackball, yes a trackball, on the keyboard!!

Damn it!

 

[cb88]

Well... VHDL isn't hard (at least the basic stuff isn't... but it does have a whole class dedicated to it later on)

myHDL is pretty pointless since it is not a standard like VHDL or Verilog where you have a lot of work already in the wild that can be built on and obvioulsy you are gonna lose some of the functionality/flexibility of those languages I'm betting that if you tried really hard your code probably wouldn't even work on real silicon if you used MyHDL

My point is... leave the HDL to engineers (unless you wanna get the engineering degree too ) and stick with software there is a reason getting an EE or CE degree is reallllly hard (doable but still...)


DISCLAMER:
I guess I come from a group similar to kernel devs... anything other than C and assemly is crap and such sadly I only know C++ and *cough* java atm ...

 

[Exophase]

My point is... leave the HDL to engineers (unless you wanna get the engineering degree too ) and stick with software there is a reason getting an EE or CE degree is reallllly hard (doable but still...)

That's a little arrogant of you - you say that you program in C++ and Java, wouldn't it be just as well for us to say to leave that to the software engineers unless you want to get a degree in it?

I'm actually learning VHDL right now because my employer wants me to use it for them.

 

[Geuben]

I'm currently learning some VHDL as part of my EEE degree. It's not that difficult programming wise, the concepts are the hardest part to get your head around. Were working in groups to create a high throughput AES machine, which requires deep sub pipelining.

 

[sindbad]

myHDL is pretty pointless since it is not a standard like VHDL or Verilog where you have a lot of work already in the wild that can be built on and obvioulsy you are gonna lose some of the functionality/flexibility of those languages I'm betting that if you tried really hard your code probably wouldn't even work on real silicon if you used MyHDL
The point of MyHDL is that it compiles a subset of python down to Verilog or VHDL, which are quite standard. The best part is that the emulator is just a python module and happily runs on the python interpreter.

 

[jandecaluwe]

myHDL is pretty pointless since it is not a standard like VHDL or Verilog where you have a lot of work already in the wild that can be built on and obvioulsy you are gonna lose some of the functionality/flexibility of those languages I'm betting that if you tried really hard your code probably wouldn't even work on real silicon if you used MyHDL

No need to bet, just ask someone who knows
To understand why MyHDL designs work, there's not even a need to refer to actual silicon. To synthesize, you need to
convert to Verilog or VHDL first. Assuming you agree that those can work on silicon , the remaining problem is to prove that
the MyHDL convertor to Verilog/VHDL works fine. This is just a matter of RTL cycle per cycle comparison; the distribution
even contains a tool to make that easier. It is also how I develop the convertor itself using a test-driven approach.

BTW, note that conversion to Verilog/VHDL is the way MyHDL hooks into "standard" design flows. You can try something new
without giving up your trusted environment.

Finally, let me assure you that there is real working MyHDL silicon out there. Last year I did a significant ASIC design myself,
and you'll find a few pointers on the MyHDL website. However, most companies keep their projects rather secret, although I am
aware of several successes through informal contacts.

My point is... leave the HDL to engineers (unless you wanna get the engineering degree too ) and stick with software there is a reason getting an EE or CE degree is reallllly hard (doable but still...)

The goal of MyHDL is indeed to achieve the opposite: HDL design as a mainstream software discipline and FPGAs
as a programming platform.