GP32 Arm920 Thumb Mode On Gp32


slaanesh

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Just wondering.

GP32's 920T CPU can run in 16-bit THUMB mode.

GP32's memory is 16-bit wide.

It this a better fit?
Has anyone experimented with compiling in THUMB mode vs ARM mode?
Could THUMB mode be faster?

Technical explanations welcome.
 
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'slaanesh' said:
Just wondering.

GP32''s 920T CPU can run in 16-bit THUMB mode.

GP32''s memory is 16-bit wide.

It this a better fit?
Has anyone experimented with compiling in THUMB mode vs ARM mode?
Could THUMB mode be faster?

Technical explanations welcome.
Globally smaller size but not faster execution (it would be slower indeed).

Only half of registers are accessible and some ARM instructions need to be turned into several THUMB instructions.

Thumb instructions is for code density, not for performance.

Example :
CODE

ARM :
-----
LDREQ r0,[r1]
LDRNE r0,[r2]
ADDEQ r0, r3, r0
ADDNE r0, r4, r0

Thumb :
-------
BNE L1
LDR r0, [r1]
ADD r0, r3, r0
B L2
L1
LDR r0, [r2]
ADD r0, r4, r0
L2

Thumb-2 :
---------
ITETE EQ
LDR r0, [r1]
LDR r0, [r2]
ADD r0, r3, r0
ADD r0, r4, r0



Thumb-2 is the real winner in performance AND code density in this example.

NOTE: I(f)T(hen)E(lse)T(hen)E(lse)
 
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GP32 is using 16bit SDRAM? News to me, I always assumed 32bit. Guess it doesn't have faster memory than GP2X afterall.

However, you will never ever execute instructions directly from main memory (if you do performance will be very poor). Instead you should always be executing from instruction cache, which will have a 32bit interface on any ARM9. Thumb's greater code density does theoretically mean fewer cache instruction cache misses, however I think you'll find that this is rarely a bigger win than what you lose due to the inferior nature of Thumb code. Instruction cache tends to do fine with code that runs a lot within critical inner loops (like renderers) - if the loop fits in icache then you'll be okay (on the other hand, interpreters for emulators might have a much bigger footprint). The bus width to memory is irrelevant because the cache line fills happen at the same word size loads regardless of whether it's ARM or Thumb code.

If you look at Nintendo DS code, it tends to be ARM code despite having half as much L1 instruction cache as GP32 (8KB). This is in stark contrast to GBA code, which is almost always Thumb when running off of the cart, due to direct 16bit fetches (code running off of IWRAM, on the other hand, tends to be ARM).

In the end, hand optimized ARM code will probably win more in code density than compiler generated Thumb code anyway.
 
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