velvetfr
Still Fresh
Hi,
I am currently designing some functions to set the clock registers of the GP32. When reading the Samsung Arm920T manual, I see that there is a limit for HCLK and PCLK of 66MHz, which in fact limit also FCLK (due to the fact that FCLK is used as a master clock for HCLK and PCLK) to 132MHz ... what is about this 166MHz overclocking, and I assume that this trick do not respect this limit of 66MHz for HCLK and PCLK ? Am I right, or miss something ?
Thanks,
velvetfr
I am currently designing some functions to set the clock registers of the GP32. When reading the Samsung Arm920T manual, I see that there is a limit for HCLK and PCLK of 66MHz, which in fact limit also FCLK (due to the fact that FCLK is used as a master clock for HCLK and PCLK) to 132MHz ... what is about this 166MHz overclocking, and I assume that this trick do not respect this limit of 66MHz for HCLK and PCLK ? Am I right, or miss something ?
Thanks,
velvetfr