Cyclone Core Integrated On Mame Gp32 !!!

[Franxis]

DaveC, not yet... we have a lot of problems

 

[DaveC]

Well good luck with it. I hope you can do it. Maybe Reesy can help, I wish I could but I can't code anything.

 

[Terry_Bogard]

- DrZ80: Reesy don't want to release DrZ80 source code yet, because he is improving the emulator yet, it lacks documentation, and some functionalities are not ready for MAME integration

DrZ80 is getting there I finally got around to completing the interrupt code last weekend. Hopefully this weekend I can knock up some basic documentation and release the source code. I may even add it to mame myself but it really depends on how much time I get.

I've sent you what I've got so far so check your hotmail address.

Reesy

​

Hello Reesy,

At other Posts, I refer to in the near future I repot Mame 0.96 ver to PocketPC(XScale 270),you know,Z80 need optimized too.

So I hope add DrZ80 to my Mame Project, if you can sent it to me,I will try to integrate it.Thank you very much.

My email:Terry_Bogard@Hotmail.com

 

[Reesy]

I'm having some issues with getting DrZ80 into Mame, the problems are to do with memory banking. Once I've figured out how Mame handles memory banking I should be able to add DrZ80 to it.

Once DrZ80 been added to MameGP I'll send it across to you.

 

[Terry_Bogard]

I'm having some issues with getting DrZ80 into Mame, the problems are to do with memory banking. Once I've figured out how Mame handles memory banking I should be able to add DrZ80 to it.

Once DrZ80 been added to MameGP I'll send it across to you.

​

Thank for your reply,hope the problems are solve quick!

If I can help you anything,please tell me.

Good luck!

 

[Reesy]

Well you may well be able to help.

The problem I have is that DrZ80 uses a direct pointer to memory when emulating the Z80 PC and SP registers. This basically means that instead of holding an offset into memory they actually hold the pointer to an address in the hosts system memory where the PC or SP would be.

If you take the Z80 PC for example. Most emulators would store the 16bit value ( 0x0000 to 0xFFFF ) when they want to read the next opcode at the current pc they pass the PC to their memory handlers and then the memory handlers return the byte at that address.

Now in DrZ80 I store the actual address of the next opcode. Say the Z80 PC was 0x100 and I had the emulated Z80 memory located address 0xC0000000 on the host system, the address in DrZ80's PC register would actually hold 0xC0000100.

DrZ80 PC = PC_BASE_ADDRESS + Z80PC

So instead of having to go through a memory handler I can just read the next opcode directly from address 0xC0000100. This saves a load of cpu time.

So my problem in Mame is working out what the PC_BASE_ADDRESS is, if you can think of way of doing this then I'm all ears

Reesy

 

[Franxis]

Well you may well be able to help.

The problem I have is that DrZ80 uses a direct pointer to memory when emulating the Z80 PC and SP registers. This basically means that instead of holding an offset into memory they actually hold the pointer to an address in the hosts system memory where the PC or SP would be.

If you take the Z80 PC for example. Most emulators would store the 16bit value ( 0x0000 to 0xFFFF ) when they want to read the next opcode at the current pc they pass the PC to their memory handlers and then the memory handlers return the byte at that address.

Now in DrZ80 I store the actual address of the next opcode. Say the Z80 PC was 0x100 and I had the emulated Z80 memory located address 0xC0000000 on the host system, the address in DrZ80's PC register would actually hold 0xC0000100.

DrZ80 PC = PC_BASE_ADDRESS + Z80PC

So instead of having to go through a memory handler I can just read the next opcode directly from address 0xC0000100. This saves a load of cpu time.

So my problem in Mame is working out what the PC_BASE_ADDRESS is, if you can think of way of doing this then I'm all ears

Reesy

​

I integrated Cyclone and i solved this problem accesing OP_ROM and OP_RAM MAME variables. But these variables contains only access to current memory banks ?. To get access to other memory banks, i think we will have to build a more
sofisticated z80_rebaseSP() function to change between memory banks (Z80.regs.Z80SP_BASE) i think. We should add a function in memory.c to get
pointers from diferent memory banks. See memory.c: cpu_readmem16() in example to see how MAME access to different memory banks... Maybe this should help???

Regards.

 

[Terry_Bogard]

Well you may well be able to help.

The problem I have is that DrZ80 uses a direct pointer to memory when emulating the Z80 PC and SP registers.  This basically means that instead of holding an offset into memory they actually hold the pointer to an address in the hosts system memory where the PC or SP would be.

If you take the Z80 PC for example.  Most emulators would store the 16bit value ( 0x0000 to 0xFFFF ) when they want to read the next opcode at the current pc they pass the PC to their memory handlers and then the memory handlers return the byte at that address.

Now in DrZ80 I store the actual address of the next opcode.  Say the Z80 PC was 0x100 and I had the emulated Z80 memory located address 0xC0000000 on the host system, the address in DrZ80's PC register would actually hold 0xC0000100.

DrZ80 PC = PC_BASE_ADDRESS + Z80PC

So instead of having to go through a memory handler I can just read the next opcode directly from address 0xC0000100.  This saves a load of cpu time.

So my problem in Mame is working out what the PC_BASE_ADDRESS is, if you can think of way of doing this then I'm all ears

Reesy

​

Oooo...,the problem like for my integrated Cyclone problem!

follow code:

static unsigned int MyCheckPc(unsigned int pc)
{
pc-=m68000_cpu.membase; /* Get the real program counter */
if (pc<0xff0000/*pc<RomLength*/) m68000_cpu.membase=(int)m68000_rom; /* Jump to Rom */
if (pc>=0xff0000) m68000_cpu.membase=(int)m68000_ram-0xff0000; /* Jump to Ram */
return m68000_cpu.membase+pc; /* New program counter */
}

static void m68000_reset(void* param)
{
memset(&m68000_cpu, 0,sizeof(m68000_cpu));
m68000_cpu.checkpc =MyCheckPc;
m68000_cpu.read8 =MyRead8;
m68000_cpu.read16 =MyRead16;
m68000_cpu.read32 =MyRead32;
m68000_cpu.write8 =MyWrite8;
m68000_cpu.write16 =MyWrite16;
m68000_cpu.write32 =MyWrite32;
m68000_cpu.fetch8 =MyRead8;
m68000_cpu.fetch16 =MyRead16;
m68000_cpu.fetch32 =MyRead32;

m68000_cpu.srh=0x27; /* Set supervisor mode */
m68000_cpu.a[7]=m68000_cpu.read32(0); /* Get Stack Pointer */
m68000_cpu.membase=0;

{
// m68000_ram=OP_RAM;// Where is Mame0.96's RAM?
// m68000_rom=OP_ROM;// Where is Mame0.96's ROM?
}

m68000_cpu.pc=m68000_cpu.checkpc(m68000_cpu.read32(4)); /* Get Program Counter */

pending_interrupts = 0;
}

I must find a valid m68000_cpu.membase,like your PC_BASE_ADDRESS

I agree Franxis said 'We should add a function in memory.c to get pointers from diferent memory banks'... I guess it's a solve way...

Let's solve it together

BTW:What is you integrated M.A.M.E ver?My code base M.A.M.E 0.96.

 

[Reesy]

That a good start.


Terry check your email, I've sent you DrZ80. The documentation is not complete yet but it will give you a chance to familiarise yourself with the code. Its now licensed under the GPL so you can release it in your release of Mame...if we ever get it working of course.

Later

Reesy

 

[Terry_Bogard]

Hello, Franxis&Reesy

Now I can move forword this place (as picture below showed), I compiled the file with extended name Cyclone.asm by Microsoft Compiler(armasm.exe), then run
it, I can see the value of PC(Cyclone.pc - Cyclone.membase) is changing. but when I compile Cyclone.s file by Intel Compiler(Intel C++ Compiler Standard
Edition for Windows CE 2.0, asxscce.exe), then run it, there is a problem that the value of PC always stays constant value it gets first time.

Show picture

It runs all right with C core, but there is a problem with ASM core. The values of PC(Cyclone.pc - Cyclone.membase) are same when it's running with both cores before CycloneRun()/C_CoreRun() first run, but they are different once CycloneRun()/C_CoreRun() has been called with same value of cycle. By the way, I use memset(&Cyclone,0,sizeof(Cyclone)) therefore value of irq is equal with 0. I have got roms booted and it can stay running until the picture showed above pop up. I don't know whether MyReadX() and MyWriteX() interfaces I implemented are all right. If they are right, where is the problem? I want to get value of instructor registers in order to compare values between C core and ASM core, do you have any methods to realize it? At the last, would you like to give me some suggestions?

to Reesy:
I think Z80's OP_ROM and OP_RAM is MAME's global variable opcode_base(OP_ROM) and opcode_arg_base(OP_RAM), but you must check current activecpu when use them, because other cpu use them too, hope this should help

I did not receive your letter yet, if you are convenient, please send it to my another mail box, it's address is Terry.Zhang@Gmail.com. Thanks a lot.