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Yes and your netbook doesn't have memory, screen, HD and Wifi that all eat significant power? n330 was not popular in netbooks because it's not a mobile chip, it was designed for small desktops.

They describe part of it. But you don't get tricky details that can kill your performance very badly. For instance, do they describe aliasing issues in branch buffers due to the hashing function in use or due to index limitations? But I agree there's a lack of optimization guide for ARM...

If you don't get a ION-based netbook then you probably won't get faster video than an SGX SoC :) One A9 should be 10-20% faster at the same frequency as an Atom for integer code.

Intel and AMD don't describe such things as branch predictors either. These are typically patented or completely secret.

That's the sad truth. So if N450 performance-level is mandatory, forget about ARM netbook.

Where did you get that information from? It doesn't make sense to me, though it can be true.

Silly me, I had explained why it was doing so, but I probably accidentally deleted that part in my answer. The ARM EABI requires the stack to be aligned to a multiple of 8. I agree gcc 4.3.3 does it in a stupid way, given that most advanced ARM processors have an internal 64-bit interface with...

It's because your code uses an undefined behaviour since it doesn't return a value for main. Using it, CSL generates: .LFB11: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. movw r0, #:lower16:.LC0 movt r0, #:upper16:.LC0 b...

For gcc 4.3.3, I can't say. CSL2009q3 does it: $ ~/work/Cross/arm-2009q3-67/bin/arm-none-linux-gnueabi-gcc -O2 -mcpu=cortex-a8 -S hello.c -o hello-test.s $ cat hello-test.s [...] .LFB11: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 stmfd sp!, {r3, lr} .save...

Are you sure? Did you try this -mcpu=cortex-a8 -mfpu=vfp -mfloat-abi=softfp BTW I've been using CSL2009q3 for months without any issue.

I'd even say that *proving* such (non-)usage is the same as being able to detect all code paths statically, so it's intractable :)

PowerNow has been available for AMD chips since 2000 on the K6-2+.

Huh? My x86 changes frequency and voltage on the fly without any issue, using cpufreq.

I guess (hope) it's because they have some unified driver and ES 1.1 is probably still used by some customers :)

@ WizardStan, conso: sorry, I'll try to explain. For me a back-end is a program that takes some input and generates native code. In that case, it would mean translating Quake3 internal representation (qvm, for Quake virtual machine) into ARM code at runtime.

conso, you didn't get it :)

So if I understand you correctly, an ARM back-end would be very desirable, right? Any idea of what the impact on speed the interpreted VM has?

I mean this: http://en.wikipedia.org/wiki/Quake_III_Arena#Virtual_machine Given there's no ARM back-end all QVM files are interpreted.

I wonder what the impact on Q3 speed the interpreted VM has...

At last some interesting numbers, thanks :) Can you say what parts of the CPU/SoC this port of Q3 uses? - NEON? (I guess it does) - SGX? (it surely does) - DSP? (I guess it doesn't) If I'm right, the only missing thing is the DSP. But your test is definitely better than anything I've seen...