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I don't believe Craig has much of a hand at all in designing this machine outside of some suggestions (a la GP2X/GPH). It seems to me this is another company's project, and Craig is acting as a liason to the GP2X/GP32 community to secure an audience and help them gear the device toward it. I'm...

Um, not at all. :P The rules are rational and so are the moderators-- who are selected for entirely different reasons than being 'vocal members of a clique' like 'who would actually make a good moderator'. If you repost something that is old, you MIGHT get put on probation for a few hours at the...

I've seen benchmarks to indicate it however I do not have them here in front of me. It's pretty apparent in any kind of thorough testing though. I've had a PDA with a 624 MHz XScale which I was able to overclock to 730 MHz. It performed slower than my current PDA at those speeds (which has a...

I don't see the PSX part being a problem. Can't speak for DosBox. Software rendering is the part of PSX emulation that hogs the most CPU cycles, so once a hardware renderer is implemented performance should dramatically improve. I'm sure not every game would run at 60 FPS with No frameskip (The...

It's no big secret. Just avoiding sensationalism. But I'll admit morbid curiosity at some of the (unexpected) controversy that cropped up. "There's a shapeshifting Epicenter on the loose! It could be anyone!" "Anyone?!" Like WarmFluffyUK said, I'm only here to add helpful info and see if I...

Have you managed to confirm that the VFPU in the 3D accelerator block is usable as a general purpose coprocessor, or is that conjecture? MagicEyes' documentation does not specify any standalone VFPU block.

Aside from some calling of names the new thread is staying marginally civil, so far. Aside from a few people calling names and calling me a troll for whatever reason, it's doing better than the last one, at least. I do hope whatever has some people so riled up can put whatever misgivings they...

Most SoCs with a single processor don't have a more powerful one to compensate; i.e. you'll probably be making a choice between 2 SoCs, with either 1 sub-400 MHz processor or 2. And they're going to be pretty similar parts, in most cases, unless it's a DSP instead of a coprocessor. (In the case...

The price of the MMSP2+ is clearly less than that of the i.MX31. Even if that doubled the cost of the MMSP2+, it would be a small increase considering it encompasses the majority of the system's hardware. One doesn't need to know the exact ratio of the prices when either one will be so inexpensive.

I thought you were implying the prior thread contained this info and thought I'd spare someone looking through 101 pages for it. My mistake.

Conjecture based on fact is different from a guess, but you're more than entitled to your views. I can't rationalize labelling that as trolling, however. Even if it's at a moderator's discretion to lock a topic, I didn't see a real justification for it. Likewise I can't say that I agree with...

When there's more cores there's more potential failing points, but if clock scalability is anything like the E6600 I tested it should go quite far. Using a Zalman CNPS9500-Cu-LED it was able to reach a staggering 3.5 GHz with only a minor vcore boost, and still ran very cool.

A non-MMSP2+ chipset wouldn't limit the appeal to the GP2X community, it would only add the possibility for a more feature-rich device with greater programmer appeal and put a significant dent in power consumption. However the MMSP2+ would be fine so long as the engineers are very careful to...

The EEE PC does not have "specs to run Halo". That title ran poorly on PCs with 1.5 GHz+ processors, 1GB of RAM or more, and GF5/equivalent Radeon series GPUs. That system utilizes simple onboard Intel graphics meant for basic productivity/business use and not much else. Generally Intel onboard...

Intel makes processors with all sorts of weird architecture just to sustain a high-clockspeed and try to hide major deficiencies of their design and get people to buy with a high-clock-speed advertising. This was true of the previous generation of Intel desktop processors (Pentium 4/D) however...

The MMSP2+ is BGA as well, and that would be an enormous number of pins to put on a header. I agree that whomever is engineering the device should not waste the chipset's features by leaving them unconnected. A good implementation of USB host capability would unlock a lot of flexibility as well.