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to be exact PSP has : 31 GPR + 32 FPR + 128 scalar VFPU registers (which can be also seen as 32/64 vectors or 8/32 matrixes registers in 2D/3D or 4D) long before Sony released its psx emulator (POPS) i wanted to use VFPU registers to store PSX registers, but transfering a scalar VFPU register...

huh, even if PSP has more registers, nullDCe cannot use a 1:1 register mapping for all the existing SH4 registers - so at the end you'll need a save/restore MIPS registers mechanism for some SH4 registers anyway. Besides, Pandora has a more powerful cache, and some hardware improvements like a...

so IL contains only a subset of source instruction ? "AND reg, mem32" would not map an IL instruction ? Or you have also intermediate 1:1 translations ? if you read "AND mem32, reg", you directly generate something like IL_store32(IL_and(IL_reg(...), IL_load32(mem32)), mem32) or by transforming...

And you think it is a good example of what it should be ? just remember that we are in "Pandora Development" category here.

okay, i make a confusion between his "PEEP" and "SO". Anyway, looking at SO source code, I was scared by the amount of source files (supposedly he reused SO in PEEP). But, wait, it is a static dynamic translator so no need to put it in an emulator, right ? I guess, the only interesting point is...

Is the source code you're talking about not the file called superoptimizer-112606.tgz ? EDIT: this source seems to contain an optimizer only for x86 -> x86.

of course, I'm still waiting for it.

do you mean SYSCALL instruction to execute an HLE function in native code ? as far as I know, there is no need to HLE'ize anything else. @JayFoxRox: how do you handle NID functions, do you patch them into "JR $RA; SYSCALL #id" regardless they are user or kernel function to let SYSCALL executes...

oh yes, I see now : "printing some GU stuff to the console which probably slows down a bit". Not probably, it's really slow. You should have an option to cut off logs or console output, they make the emulation really too slow. For infos, when we run our interpreter in Debug mode (with logs and...

To close a topic is not necessary unless it's an obvious scam or gratuitous offense to someone. You are all grownups enough to ignore such a topic and let it sink in the deep abyss instead of saying NO repeatedly and letting the topic revive :)

:lol:, you're totally right, we call them references in C++ term. I was just speaking in C equivalence term. Note that the first C++ compiler (CFront) produces a C source as output - another reason why people may think C++ favours complexity.

We shouldn't forget the historical aspect of C and so of C++. The first C compilers weren't smart enough to optimize language machine production as we are used to nowadays. But as it allows a fine control on language machine production, C was a "natural" candidate to make an operating system...

I would rather say the "->" operator has a valid meaning for a non-pointer. As a good example : boost::shared_ptr. You use it like "boost::shared_ptr false_ptr = true_pointer;" and not like "boost::shared_ptr *false_ptr = true_pointer;". So it is an object and not a pointer when instantiated...

I'll say you're a bit tired :). ADDI is strictly identical to ADDIU except that ADDI raises an exception if overflow occurs. SLTI ===> signed comparison with a *sign-extended* immediate SLTIU ===> unsigned comparison with a *sign-extended* immediate Memento: Only immediates in logical...

0x00010000 + 0xFFFFE9E8 = 0x00010000 - 0x00001618 = 0x0000E9E8 I don`t see any error. usually when you want to compute a constant address for a read/write access, we should proceed this way : CODE void emit_lwa(u32 rt, u32 rs, u32 address) { u32 hi = address>>16; u32 lo = address&65535...

Here some bits for Allegrex ISA in a shortest and stripped form : CODE bitfields: rs:5; rd:5; rt:5; sa:5; lsb:5; msb:5; fs:5; fd:5; ft:5; fcond:4; vs:7; vt:7; vd:7; vcond:4; vt1:1; vt2:2; vt5:5; vs_m:3; vs_c:2; vs_r:2; vs_x:1; vs_o:1; vt_m:3; vt_c:2; vt_r:2; vt_x:1...

In my opinion : - kernel mode : only some homebrews can do it. Its use isn't really justified most time or at least applications using those mode are probably not justified to be emulated. Not emulating it allows you not to need to emulate hardware registers mapped at 0xBFxxxxxx (only...

i know it ! I`m just explaining why "int *x, y, z;" means only x is a pointer because of the way c/c++ parser works, that`s all. note also that "typedef (int*) f(void);" generates an error, which is another reason why some people may prefer "int *x" instead of "int* x". Of course, people are...