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    Dingoo Jzrisc - Mips32R2 Compatible ?

    Ok, I have a very bad news. I was testing in the wrong game loop. Putting the test in the right place freezes the game. So the manual seems a complete lie about MIPS32R2 implementation. Two possibilities : no MIPS32r2 implemenation or they are implemented with no standard opcode (like Allegrex -...
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    Dingoo Jzrisc - Mips32R2 Compatible ?

    Keeping -mips32 for the binary, SEB and SEH perfectly work on Flatmush's MineSweeper. But to make them work, I was forced to do so : inline __attribute__((always_inline)) int __seb(int x) { int result; __asm__ __volatile__ (".set push; .set noreorder; .set mips32r2; SEB %0, %1; .set pop" ...
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    Dingoo Jzrisc - Mips32R2 Compatible ?

    I'm trying it but i cannot find a working program which builds fine :/. I tried guide-how-to-compile-apps-for-dingoo-native-os-without-the-sdk.
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    Dingoo Jzrisc - Mips32R2 Compatible ?

    Something is extremely wrong. From 02_cpu_spec.pdf, I can read : And I can see a table listing some MIPS32r2 instructions : ROTR/ROTRV: 3 cycles instead of 1 cycle (2 extra interlock cycles)EXT/INS: 4 cycles instead of 1 cycle (3 extra interlock cycles)SEB/SEH: 2 cycles instead of 1 cycle (1...
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    Gpsp For Dingux With Dynarec

    only EABI requires it as far as I recall (I saw it when I added a patch to psp-ggc to add -mpreferred-stack-boundary=n).
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    Dingoo Jzrisc - Mips32R2 Compatible ?

    what a pity ! so you're confirming MIPS32R2 are not implemented ? because the cycles of thoses instructions were given by their documentations. And yes I may be interested. I'll PM you.
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    Gpsp For Dingux With Dynarec

    That's weird. I read EXT/INS/ROTR/ROTRV exist in JzMips (they are just slower than the real MIPS32R2 since they take at least 4 cycles instead of 1 cycle). But the guy is replacing those instructions by a bunch of instructions :/. Besides, if GPSP is emitting those isntructions in a delay slot...
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    Pandora 2, A Year Or So From Now?

    1) Those figures are for INTEL/AMD cores (energy hungry). Besides, dual core and four core don't have the same frequency so their benchmarks are not valid for what you try to state. 2) Most games are not coded to handle all cores. Most are probably considering only two permanent threads to run...
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    Pandora 2, A Year Or So From Now?

    can anyone confirm this ad2p bluetooth ability in the Pandora's operating system ?
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    Pandora 2, A Year Or So From Now?

    I ordered a Pandora from the first batch. And at this time, I must admit I'm less and less impressed with it. Supposedly OP has learned about their errors and won't take two years to design and produce their future products, I'm still interested with a Pandora II with a multi-core Cortex-A9 (two...
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    Mupen64Plus

    ah yes ! that was what you meant by "lands". I would treat it this way : bb0 { nop; blt bb2; @bb1; } bb1 { nop; add r1, r2, r3; bgtz bb3; @bb3; } bb2 { add r1, r2, r3; @bb3; } bb3 { ... } legend: bbX - basic block (linear instructions sequence).@bbX - duplicate it because register...
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    Mupen64Plus

    i'm not sure to understand... are both of you saying that you had in SHx/MIPS code a branch instruction into a delay slot of another branch instruction like "blt 0f; b 1f" ??? are you sure you are in a valid code ? if processor doesn't complain, i will expect for the second branch instruction to...
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    Dingoo Push And Pop Jzsimd Media Registers In Dingux ?

    do you mean jz SIMD instead ? as for me I didn't code anything on Dingoo as I'm pretty busy with other projects. I wonder if jz SIMD is MIPS DSP comaptible as they seem to share some similarities about their goal. EDIT: well, not really.
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    Dingoo Push And Pop Jzsimd Media Registers In Dingux ?

    I think booboo uses linux patches done by the company. And jz RISC is mips32r2 minus FPU compatible.
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    The Nightmare That Gph Made Wiz...

    seriously, some of you are like hysterical mothers overprotecting their baby from a chimera. I can understand glossywhite was furious from what i can read about. And honestly, why do you need to react so badly to his feeling ? it's like reading some fanboys reactions in some...
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    Benefits Of Pandora Over Psp?

    As one of main coders of JPCSP and now of PCSP, I can only agree with Exophase's opinion. I don't think a psp emulator can be done by only one coder in a reasonable time. And I cannot even confirm a fullspeed is doable right now. I can easily reach several hundreds FPS in-game - intros and...
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    Dingoo Jzsimd - Mxu Instructions List

    Like standard MIPS general purpose registers, media register has a special register XR0 hardwired to 0 as value. So it should be possible to make scalar operation like "D32ADD XR2, XR0, XR1, XR0, SS" being equivalent to "XR2 = -XR1". So if you need to use 3D integer vectors, the fourth register...
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    Dingoo Jzsimd - Mxu Instructions List

    nope, neither gcc nor as are aware of them. They use a hack by running this AWK script mxu_as on a .s file as a preprocessor to transform each of those instructions into a .word 0bXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX. of course, we can imagine to add them in binutils and gcc. I think the minimal...
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    Dingoo Jzsimd - Mxu Instructions List

    Indeed, most of SIMD instructions compute on 8 x 8-bit, 4 x 16-bit or 2 x 32-bit through two registers XD and XA as input/output. pastebin: I have jz_mxu.h but the C version is incomplete (only 34 instructions have their C counterpart). So I guess some reverse-engineering are necessary to find...
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    Dingoo Jzsimd - Mxu Instructions List

    WORK IN PROGRESS Analysing the mxu_as AWK script, I can determine there are 58 basic SIMD instructions having a common opcode name. Amongst them, there is 12 SIMD instructions which can be subdivised into 48 instructions and 3 into 48 instructions and 1 into 8 instructions because they have...
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