On 02/15/2016 11:38 PM, H. Nikolaus Schaller wrote:
<snip> Here a log if someone can help to decipher.
[ 5.586922] driver_register 'pwm-backlight' [ 5.591702] backlight supply power not found, using dummy regulator [ 5.599205] ------------[ cut here ]------------ [ 5.604038] WARNING: CPU: 0 PID: 962 at drivers/bus/omap_l3_noc.c:147 l3_handle_target+0x1b0/0x204() [ 5.613602] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4PER2 (Idle): Data Access in Supervisor mode during Functional access
This looks like OMAP5 is being unhappy about dmtimer clock disable, supposedly some L3 interconnect access still in progress?
Maybe something like this would help (untested in any way):
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 7a327bd..af38614 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -670,6 +670,7 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, l |= OMAP_TIMER_CTRL_PT; l |= trigger << 10; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, 1);
/* Save the context */ timer->context.tclr = l;
... or maybe adding some udelay() there instead. It that doesn't help, perhaps dmtimer clock can't be disabled while pwm is in use? I'm talking about omap_dm_timer_disable() in omap_dm_timer_set_pwm().
Grazvydas