Hi Andrey,

Am 04.08.2016 um 01:29 schrieb Andrey Utkin andrey_utkin@fastmail.com:

Hi Nikolaus!

I am wondering SD card of which speed (and price) makes sense with Pyra. In other words, which speed can be utilized and is not a waste of money. I believe hundreds of backers are interested in this, too. So this info should be published on Pyra Wiki in comprehensive form. Asked on IRC, but didn't get any solid data references. Most credible comment was aTc's "it all depends on how hns has the sd slots connected anyway". So I am asking you :)

Here is the mapping:

TRM MMC/SD/SDIO Instance 25.6.1 module base address 25.6.1 ext. IF name OMAP chip Table 25-2 and 25-3 Interface name Pyra-CPU-Board Use on Mainboard bit width MMC1 4809 c000 sdcard MMC2 SD-L 4 bit MMC2 480b 4000 emmc MMC1/eMMC µSD 4 / 8 bit MMC3 480a d000 wlsdio SDIO WiFi 4 bit MMC4 480d 1000 sdio4 MMC3 SD-R 4 bit MMC5 480d 5000 sdio5 (OMAP5430 only) n/a n/a

Boot-ROM is looking for MLO/SPL on MMC1 and MMC2.

About the speeds the OMAP5 documentation says:

MMC2 (emmc) interface is compliant with the JC64 eMMC Standard v4.5 and it supports the following eMMC applications: • Standard JC64 SDR at 24 MHz, 8-bit data, half cycle, 1.8 V • High-speed JC64 SDR at 48 MHz, 8-bit data, half cycle, 1.8 V • High-speed JC64 DDR at 48 MHz, 8-bit data, and 1.8 V • High-speed HS200 JC64 SDR at 192 MHz, 8-bit data, half cycle, 1.8 V

µSD slot has a level shifter so that it also supports 3.3V - but 4 bit only! What you should check is if the TXS0206A supports highest speeds.

MMC3 (wlan) and MMC4 (right SD slot) interfaces are compliant with the SDIO3.0 standard v1.0, SD Part E1 and for generic SDIO devices, it supports the following applications:

• SDIO Standard speed at 24 MHz (SDR12 mode of the SD Standard v3.01), 4-bit data, SDR, half cycle, 1.8 V • SDIO High speed at 48 MHz (SDR25 mode of the SD Standard v3.01), 4-bit data, SDR, half cycle, 1.8 V

Right SD slot has a level shifter so that it also supports 3.3V. What you should check is if the TXS02612 supports highest speeds.

MMC1 (left SD slot) interface is compliant with the SD Standard v3.01 and it supports the following SD Card applications:

• Default speed at 24 MHz, 4-bit data, SDR, half-cycle, 3.3 V • High speed at 48 MHz, 4-bit data, SDR, half-cycle, 3.3 V • SDR12 at 24 MHz, 4-bit data, half-cycle, 1.8 V • SDR25 at 48 MHz, 4-bit data, half-cycle, 1.8 V • UHS-I SDR50 at 96 MHz, 4-bit data, half-cycle, 1.8 V • UHS-I SDR104 at 192 MHz, 4-bit data, half-cycle, 1.8 V • UHS-I DDR50 at 48 MHz, 4-bit data, 1.8 V

From that you should be able to deduce which card has which max. read speed in which slot. I think you have to reduce by 10% for protocol and CRC overhead. Write speed is usually limited by the card and much lower.

And I don't know which modes are supported by omap_hsmmc.

From this material it should be possible to make a nice wiki table.

BR, NIkolaus