Hi,

Am 16.08.2016 um 15:18 schrieb Grazvydas Ignotas notaz@openpandora.org:

Hi,

On 08/16/2016 01:41 PM, H. Nikolaus Schaller wrote:

...

Have looked through the data sheet and functional register document a little more.

Triple mode for SMPS1&2&3 seems to be hard coded by OTP into the chip variant. Means: we can't really change that. At least not what happens right after power-on.

But SMPS3_CTRL could allow to disable SMPS3 completely.

I've dumped the registers and unfortunately it's already off (registers dumped on both uEVM running full Linux and Pyra running u-boot, I can no longer successfully boot Linux on Pyra and u-boot only works for a short while when it boots at all).

The datasheet states: "If SMPS1&2&3 mode is selected, SMPS12 registers control SMPS1&2&3." so SMPS3 control registers probably have no effect anyway.

...

And SMPS_CTRL should allow to enforce single/double/triple phase mode.

There are only 3 settings: auto/single-phase/multi-phase, so I guess it will not help but it might be worth to try anyway.

I can't test it as my Pyra is not usable, but these commands should do it:

$ i2cget -f -y 0 0x48 0x44 should report 0x10, bit4 means "SMPS123 triple phase" when set, "SMPS12 dual phase, SMPS3 single phase" when cleared. bits 1:0 should be 0 meaning auto mode.

$ i2cset -f -y 0 0x48 0x44 0x11 to force single-phase $ i2cset -f -y 0 0x48 0x44 0x12 to force multi-phase

I've also checked and there does not seem to be away to disable SMPS3_CTRL, the pin has no mux and is always active (unless there is some undocumented register, which I doubt).

I have found this older mail and tried the commands - with no visible change (@1.0 GHz)!

root@letux:~# ./temperatures Sat Jan 1 23:40:42 UTC 2000 44° 44° 43° -10° 3636mV 750MHz root@letux:~# i2cget -f -y 0 0x48 0x44 0x10 root@letux:~# i2cset -f -y 0 0x48 0x44 0x11 root@letux:~# ./temperatures Sat Jan 1 23:41:05 UTC 2000 45° 45° 44° -10° 3638mV 750MHz root@letux:~# ./high-load 100% load stress test for 2 cores Sat Jan 1 23:41:10 UTC 2000 45° 45° 44° -10° 3636mV 750MHz Sat Jan 1 23:41:10 UTC 2000 45° 45° 44° -10° 3627mV 1000MHz Sat Jan 1 23:41:11 UTC 2000 44° 45° 44° -10° 3627mV 1000MHz Sat Jan 1 23:41:13 UTC 2000 48° 46° 45° -10° 3627mV 1000MHz Sat Jan 1 23:41:14 UTC 2000 52° 48° 47° -10° 3630mV 1000MHz Sat Jan 1 23:41:16 UTC 2000 55° 51° 49° -10° 3628mV 1000MHz Sat Jan 1 23:41:17 UTC 2000 57° 51° 50° -10° 3628mV 1000MHz Sat Jan 1 23:41:19 UTC 2000 57° 53° 51° -10° 3627mV 1000MHz Sat Jan 1 23:41:20 UTC 2000 58° 54° 52° -10° 3627mV 1000MHz ^Ckill 2927 2928

root@letux:~# i2cget -f -y 0 0x48 0x44 0x11 root@letux:~# i2cset -f -y 0 0x48 0x44 0x12 root@letux:~# i2cget -f -y 0 0x48 0x44 0x12 root@letux:~# ./high-load 100% load stress test for 2 cores Sat Jan 1 23:41:43 UTC 2000 47° 49° 47° -10° 3637mV 750MHz Sat Jan 1 23:41:44 UTC 2000 47° 49° 47° -10° 3623mV 1000MHz Sat Jan 1 23:41:45 UTC 2000 47° 49° 47° -10° 3627mV 1000MHz Sat Jan 1 23:41:46 UTC 2000 49° 49° 47° -10° 3628mV 1000MHz Sat Jan 1 23:41:48 UTC 2000 55° 50° 49° -10° 3627mV 1000MHz Sat Jan 1 23:41:49 UTC 2000 56° 53° 50° -10° 3630mV 1000MHz ^Ckill 3305 3306

root@letux:~#

Well, I also tried to clear bit 4 but it is set somewhere else:

root@letux:~# i2cset -f -y 0 0x48 0x44 0x02 root@letux:~# i2cget -f -y 0 0x48 0x44 0x12 root@letux:~#

So it might not be possible to turn it off from user space.

BR and thanks, Nikolaus