Just a small update on the ABE PLL lockup issue:
I've "installed" R195 (read: I've installed a solder blob there) on the uevm to make it able to experience warm resets normally. I can now reproduce the abe pll lockup there, although it seems to happen quite rarely whereas on the pyra it seems to happen on every reboot.
Interestingly, I've discovered that the ABE PLL is not locking up at warm reset. A register dump in u-boot immediately prior to a lockup in linux shows everything was still fine before control was handed over to linux. It seems linux is somehow managing to get it locked-up while trying to get it locked, and once this happens the lockup is insensitive to warm reset.
Still lots of unanswered questions, but it's a step
* Matthijs van Duin matthijsvanduin@gmail.com [170329 11:25]:
Just a small update on the ABE PLL lockup issue:
I've "installed" R195 (read: I've installed a solder blob there) on the uevm to make it able to experience warm resets normally. I can now reproduce the abe pll lockup there, although it seems to happen quite rarely whereas on the pyra it seems to happen on every reboot.
Interestingly, I've discovered that the ABE PLL is not locking up at warm reset. A register dump in u-boot immediately prior to a lockup in linux shows everything was still fine before control was handed over to linux. It seems linux is somehow managing to get it locked-up while trying to get it locked, and once this happens the lockup is insensitive to warm reset.
Still lots of unanswered questions, but it's a step
OK having it reproducable is good. My canned reply guess based on the description is that there's a missing read-back to flush a posted write somewhere in the clock code :)
Regards,
Tony
* Matthijs van Duin matthijsvanduin@gmail.com [170329 11:25]:
Just a small update on the ABE PLL lockup issue:
I've "installed" R195 (read: I've installed a solder blob there) on the uevm to make it able to experience warm resets normally. I can now reproduce the abe pll lockup there, although it seems to happen quite rarely whereas on the pyra it seems to happen on every reboot.
Interestingly, I've discovered that the ABE PLL is not locking up at warm reset. A register dump in u-boot immediately prior to a lockup in linux shows everything was still fine before control was handed over to linux. It seems linux is somehow managing to get it locked-up while trying to get it locked, and once this happens the lockup is insensitive to warm reset.
Still lots of unanswered questions, but it's a step
Seems the reason why this happens is explained in commit 8c197ccfb600 ("ARM: OMAP4460: Workaround ABE DPLL failing to turn-on"):
"The problem was exposed when u-boot was updated to NOT configure and lock the ABE DPLL on start-up. If the ABE DPLL is configured and locked by u-boot the problem does not occur. However, if the ABE DPLL is in the idle low-power bypass state and we attempt to enable a timer in the ABE power domain, it remains stuck in the disabled state. It appears to be a problem the timer interface clock as this comes from the ABE DPLL.
If we place the ABE DPLL in the MN-bypass state and not the idle low-power state, then this problem is not seen."
So the previous boot idles ABE, and then after reboot DPLL won't lock.
Regards,
Tony
On 16 August 2017 at 18:23, Tony Lindgren tony@atomide.com wrote:
Seems the reason why this happens is explained in commit 8c197ccfb600 ("ARM: OMAP4460: Workaround ABE DPLL failing to turn-on")
This doesn't really sound related to me. The problem described there is apparently a failure to get a usable interface clock to certain timers when the ABE PLL isn't enabled, and the workaround is to always enable the ABE PLL (and rely on its autoidle feature to disable it when unneeded). Our problem is that enabling the ABE PLL under certain conditions results in its state machine getting stuck.
In an IRC conversation, Nishanth Menon dug up that the ABE PLL issue is indeed known and the workaround is to use sys_clk as its input clock instead of using the 32 kHz clock:
http://gitorious.ti.com/lcpd-agross/omapdrm/commit/b55d24d8b7bcf7bc53261b82d...
Assuming this indeed fixes the problem, it seems like a good workaround for now. See below for a forward-port of this patch. I haven't yet had a chance to test it.
Perhaps in the future we might revisit this issue if we want to try entering an ultra low power mode in which the main osc is disabled and all clocks derive from the ABE PLL (apparently originally intended to allow music playback with minimal power consumption), but doing so would be quite challenging anyway due to the constraints imposed by this mode.
Matthijs
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c index 20f6985a80ef..2f818eadb516 100644 --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -229,15 +229,15 @@ static struct ti_dt_clk omap54xx_clks[] = { int __init omap5xxx_dt_clk_init(void) { int rc; - struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll; + struct clk *abe_dpll_ref, *abe_dpll, *sys_clkin, *usb_dpll;
ti_dt_clocks_register(omap54xx_clks);
omap2_clk_disable_autoidle_all();
abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux"); - sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck"); - rc = clk_set_parent(abe_dpll_ref, sys_32k_ck); + sys_clkin = clk_get_sys(NULL, "sys_clkin"); + rc = clk_set_parent(abe_dpll_ref, sys_clkin); abe_dpll = clk_get_sys(NULL, "dpll_abe_ck"); if (!rc) rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ);
On 17 August 2017 at 18:34, Matthijs van Duin matthijsvanduin@gmail.com wrote:
See below for a forward-port of this patch. I haven't yet had a chance to test it.
I just had a chance to test it.
It doesn't work. The resulting kernel hangs early during boot without any error message.
So... what did I do wrong?
Matthijs
On 14:42-20170819, Matthijs van Duin wrote:
On 17 August 2017 at 18:34, Matthijs van Duin matthijsvanduin@gmail.com wrote:
See below for a forward-port of this patch. I haven't yet had a chance to test it.
I just had a chance to test it.
It doesn't work. The resulting kernel hangs early during boot without any error message.
So... what did I do wrong?
is'nt there like a dt way of doing things? http://git.ti.com/ti-linux-kernel/ti-linux-kernel/blobs/ti-linux-4.9.y/arch/...
I think. but that said, I am not sure if the configuration needs to be done in u-boot first.
Lokesh, do you see something wrong here: http://pastebin.ubuntu.com/25347386/
Context: In an IRC conversation, Nishanth Menon dug up that the ABE PLL issue is indeed known and the workaround is to use sys_clk as its input clock instead of using the 32 kHz clock:
http://gitorious.ti.com/lcpd-agross/omapdrm/commit/b55d24d8b7bcf7bc53261b82d...
Assuming this indeed fixes the problem, it seems like a good workaround for now. See below for a forward-port of this patch. I haven't yet had a chance to test it.
Perhaps in the future we might revisit this issue if we want to try entering an ultra low power mode in which the main osc is disabled and all clocks derive from the ABE PLL (apparently originally intended to allow music playback with minimal power consumption), but doing so would be quite challenging anyway due to the constraints imposed by this mode.
Matthijs
On Saturday 19 August 2017 08:21 PM, Nishanth Menon wrote:
On 14:42-20170819, Matthijs van Duin wrote:
On 17 August 2017 at 18:34, Matthijs van Duin matthijsvanduin@gmail.com wrote:
See below for a forward-port of this patch. I haven't yet had a chance to test it.
I just had a chance to test it.
It doesn't work. The resulting kernel hangs early during boot without any error message.
So... what did I do wrong?
is'nt there like a dt way of doing things? http://git.ti.com/ti-linux-kernel/ti-linux-kernel/blobs/ti-linux-4.9.y/arch/...
I think. but that said, I am not sure if the configuration needs to be done in u-boot first.
Not necessary in u-boot.
Lokesh, do you see something wrong here: http://pastebin.ubuntu.com/25347386
Nothing. I just booted my omap5-uevm with this change and can see that input clock is changed to sys_clkin. http://pastebin.ubuntu.com/25360922/
Matthijs, Any chance you can enable earlyprintk or earlycon in your case and see where it is failing?
Thanks and regards, Lokesh
Context: In an IRC conversation, Nishanth Menon dug up that the ABE PLL issue is indeed known and the workaround is to use sys_clk as its input clock instead of using the 32 kHz clock:
http://gitorious.ti.com/lcpd-agross/omapdrm/commit/b55d24d8b7bcf7bc53261b82d...
Assuming this indeed fixes the problem, it seems like a good workaround for now. See below for a forward-port of this patch. I haven't yet had a chance to test it.
Perhaps in the future we might revisit this issue if we want to try entering an ultra low power mode in which the main osc is disabled and all clocks derive from the ABE PLL (apparently originally intended to allow music playback with minimal power consumption), but doing so would be quite challenging anyway due to the constraints imposed by this mode.
Matthijs
On 21 August 2017 at 08:15, Lokesh Vutla lokeshvutla@ti.com wrote:
Nothing. I just booted my omap5-uevm with this change and can see that input clock is changed to sys_clkin.
Interesting... I already know somewhat different things must be happening during boot on the pyra, presumably due to DT differences, since the ABE lockup after warm reset happens very consistently on the pyra and only rarely on the uEVM (after patching it to support warm reset at all). Perhaps it's related.
Any chance you can enable earlyprintk or earlycon in your case and see where it is failing?
I had earlyprintk enabled, it didn't seem very informative though...
[ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.10.7-letux-zm5 (matthijs@bob) (gcc version 7.1.0 (Debian 7.1.0-13) ) #39 SMP PREEMPT Sat Aug 19 16:21:23 CEST 2017 [ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=70c5387d [ 0.000000] CPU: div instructions available: patching division code [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache [ 0.000000] OF: fdt:Machine model: Pyra-Handheld-V5.1 [ 0.000000] debug: ignoring loglevel setting. [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] cma: Reserved 16 MiB at 0x00000000fd800000 [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] OMAP4: Map 0x00000000fed00000 to fe600000 for dram barrier [ 0.000000] On node 0 totalpages: 519424 [ 0.000000] free_area_init_node: node 0, pgdat c0c7e2c0, node_mem_map ef017000 [ 0.000000] DMA zone: 1536 pages used for memmap [ 0.000000] DMA zone: 0 pages reserved [ 0.000000] DMA zone: 196608 pages, LIFO batch:31 [ 0.000000] HighMem zone: 322816 pages, LIFO batch:31 [ 0.000000] OMAP5432 ES2.0 [ 0.000000] percpu: Embedded 15 pages/cpu @eefb4000 s31848 r8192 d21400 u61440 [ 0.000000] pcpu-alloc: s31848 r8192 d21400 u61440 alloc=15*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 517888 [ 0.000000] Kernel command line: root=/dev/mmcblk0p1 ro rootfstype=ext4 rootwait console=ttyO2,460800n8 omapdss.def_disp=lcd consoleblank=0 log_buf_len=8M ignore_loglevel earlyprintk drm_kms_helper.fbdev_rotation=8 [ 0.000000] log_buf_len: 8388608 bytes [ 0.000000] early log buf free: 63876(97%) [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 2016088K/2077696K available (4096K kernel code, 600K rwdata, 2140K rodata, 2048K init, 8621K bss, 45224K reserved, 16384K cma-reserved, 1274880K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf800000 - 0xbfe00000 ( 6 MB) [ 0.000000] .text : 0xc0008000 - 0xc0600000 (6112 kB) [ 0.000000] .init : 0xc0a00000 - 0xc0c00000 (2048 kB) [ 0.000000] .data : 0xc0c00000 - 0xc0c96248 ( 601 kB) [ 0.000000] .bss : 0xc0c98000 - 0xc1503760 (8622 kB) [ 0.000000] Running RCU self tests [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] RCU lockdep checking is enabled. [ 0.000000] Build-time adjustment of leaf fanout to 32. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] OMAP clockevent source: timer1 at 32768 Hz [ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 6.14MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16ac02862, max_idle_ns: 440795202218 ns [ 0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511085ns [ 0.002139] Switching to timer-based delay loop, resolution 162ns [ 0.004116] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns [ 0.006750] OMAP clocksource: 32k_counter at 32768 Hz [ 0.010136] Console: colour dummy device 80x30 [ 0.011348] WARNING: Your 'console=ttyO2' has been replaced by 'ttyS2' [ 0.013091] This ensures that you still see kernel messages. Please [ 0.014763] update your kernel commandline. [ 0.015889] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [ 0.017953] ... MAX_LOCKDEP_SUBCLASSES: 8 [ 0.019077] ... MAX_LOCK_DEPTH: 48 [ 0.020203] ... MAX_LOCKDEP_KEYS: 8191 [ 0.021373] ... CLASSHASH_SIZE: 4096 [ 0.022544] ... MAX_LOCKDEP_ENTRIES: 32768 [ 0.023736] ... MAX_LOCKDEP_CHAINS: 65536 [ 0.024928] ... CHAINHASH_SIZE: 32768 [ 0.026121] memory used by lock dependency info: 5167 kB [ 0.027565] per task-struct memory footprint: 1536 bytes [ 0.031080] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.28 BogoMIPS (lpj=61440) [ 0.033813] pid_max: default: 32768 minimum: 301 [ 0.035559] Security Framework initialized [ 0.036856] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.038626] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.044711] CPU: Testing write buffer coherency: ok [ 0.046179] ftrace: allocating 22648 entries in 45 pages [ 0.075764] /cpus/cpu@0 missing clock-frequency property [ 0.077206] /cpus/cpu@1 missing clock-frequency property [ 0.078630] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.104675] Setting up static identity map for 0x80200000 - 0x8020004c [ 0.194993] smp: Bringing up secondary CPUs ... [ 0.276533] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.277002] smp: Brought up 1 node, 2 CPUs [ 0.279614] SMP: Total of 2 processors activated (24.57 BogoMIPS). [ 0.281263] CPU: All CPU(s) started in HYP mode. [ 0.282502] CPU: Virtualization extensions available. [ 0.286434] devtmpfs: initialized [ 0.385940] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0 [ 0.486497] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.489135] futex hash table entries: 512 (order: 3, 32768 bytes) [ 0.491744] pinctrl core: initialized pinctrl subsystem [ 0.498459] NET: Registered protocol family 16 [ 0.504318] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.508017] omap_hwmod: l3_main_3 using broken dt data from ocp [ 0.511354] omap_hwmod: l3_main_2 using broken dt data from ocp [ 0.675294] OMAP GPIO hardware version 0.1 [ 0.724754] GPIO line 234 (gpio8_234/msecure) hogged as output/high [ 0.733684] platform 50000000.gpmc: Cannot lookup hwmod 'gpmc' [ 0.735578] omap-gpmc 50000000.gpmc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [ 0.737997] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 0.747317] irq: no irq domain found for /ocp/l4@4a000000/scm@2800/pinmux@40 ! [ 0.753439] irq: no irq domain found for /ocp/l4@4a000000/scm@2800/pinmux@40 ! [ 0.797862] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers. [ 0.800020] hw-breakpoint: maximum watchpoint size is 8 bytes. [ 0.803730] OMAP DMA hardware revision 0.0 [ 0.988948] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported) [ 0.999126] reg-fixed-voltage regulators:vdd_wilink: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/wlan, deferring probe [ 1.003522] reg-fixed-voltage bt_en: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/pinmux_bt_pins, deferring probe [ 1.009776] omap-iommu 4a066000.mmu: 4a066000.mmu registered [ 1.011775] omap-iommu 55082000.mmu: 55082000.mmu registered [ 1.016867] SCSI subsystem initialized [ 1.024017] libata version 3.00 loaded. [ 1.026172] usbcore: registered new interface driver usbfs [ 1.027868] usbcore: registered new interface driver hub [ 1.030036] usbcore: registered new device driver usb [ 1.031948] hsusb2_phy supply vcc not found, using dummy regulator [ 1.033979] usb_add_phy_dev nop-xceiv [ 1.035861] omap_i2c 48070000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/i2c1, deferring probe [ 1.038912] omap_i2c 48072000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/pinmux_i2c2_pins, deferring probe [ 1.042235] omap_i2c 48060000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/pinmux_i2c3_pins, deferring probe [ 1.045583] omap_i2c 4807a000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/pinmux_i2c4_pins, deferring probe [ 1.048905] omap_i2c 4807c000.i2c: could not find pctldev for node /ocp/l4@4a000000/scm@2800/pinmux@40/pinmux_i2c5_pins, deferring probe [ 1.053794] Advanced Linux Sound Architecture Driver Initialized. [ 1.066234] clocksource: Switched to clocksource arch_sys_counter [ 1.331156] NET: Registered protocol family 2 [ 1.334956] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 1.337102] TCP bind hash table entries: 8192 (order: 6, 294912 bytes) [ 1.341112] TCP: Hash tables configured (established 8192 bind 8192) [ 1.343315] UDP hash table entries: 512 (order: 3, 40960 bytes) [ 1.345232] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes) [ 1.348223] NET: Registered protocol family 1 [ 1.405544] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available [ 1.420422] audit: initializing netlink subsys (disabled) [ 1.426276] workingset: timestamp_bits=30 max_order=19 bucket_order=0 [ 1.430454] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 1.441500] bounce: pool size: 64 pages [ 1.442684] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250) [ 1.444710] io scheduler noop registered [ 1.445769] io scheduler deadline registered [ 1.447058] io scheduler cfq registered (default) [ 1.453836] usb_add_phy_dev omap_usb2 [ 1.456686] ti-pipe3 4a096000.phy: can't get syscon-pllreset, sata dpll won't idle [ 1.462154] pinctrl-single 4a002840.pinmux: 219 pins at pa fc002840 size 438 [ 1.464763] pinctrl-single 4ae0c840.pinmux: 30 pins at pa fce0c840 size 60 [ 1.477426] Serial: 8250/16550 driver, 6 ports, IRQ sharing disabled [ 1.491966] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 302, base_baud = 3000000) is a 8250 [ 1.494992] console [ttyS2] enabled [ 1.494992] console [ttyS2] enabled [ 1.496848] bootconsole [earlycon0] disabled [ 1.496848] bootconsole [earlycon0] disabled [ 1.501638] 4806e000.serial: ttyS3 at MMIO 0x4806e000 (irq = 303, base_baud = 3000000) is a 8250 [ 1.506149] 48068000.serial: ttyS5 at MMIO 0x48068000 (irq = 304, base_baud = 3000000) is a 8250 [ 1.553392] brd: module loaded [ 1.579557] loop: module loaded [ 1.582279] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled [ 1.583996] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode [ 1.586155] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst [ 1.592704] scsi host0: ahci [ 1.595128] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 332 [ 1.601801] libphy: Fixed MDIO Bus: probed [ 1.606394] mousedev: PS/2 mouse device common for all mice [ 1.609864] i2c /dev entries driver [ 1.610840] Driver for 1-wire Dallas network protocol. [ 1.618165] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec [ 1.623703] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 1.625007] omap_hsmmc 4809c000.mmc: requested fclk 128000 kHz, got 96000 kHz [ 1.677110] omap_hsmmc 480b4000.mmc: requested fclk 128000 kHz, got 96000 kHz [ 1.744798] omap_hsmmc 480d1000.mmc: Got CD GPIO [ 1.746005] omap_hsmmc 480d1000.mmc: Got WP GPIO [ 1.747311] omap_hsmmc 480d1000.mmc: requested fclk 52000 kHz, got 48000 kHz [ 1.797874] ledtrig-cpu: registered to indicate activity on CPUs [ 1.800784] hidraw: raw HID events driver (C) Jiri Kosina [ 1.802585] usbcore: registered new interface driver usbhid [ 1.803995] usbhid: USB HID core driver [ 1.805695] ashmem: initialized [ 1.814545] oprofile: using timer interrupt. [ 1.816455] Initializing XFRM netlink socket [ 1.817692] NET: Registered protocol family 17 [ 1.821107] Key type dns_resolver registered [ 1.822426] omap_vc_init_channel: No PMIC info for vdd_core [ 1.823892] omap_vp_init: No PMIC info for vdd_core [ 1.825146] omap_vc_init_channel: No PMIC info for vdd_mm [ 1.826543] omap_vp_init: No PMIC info for vdd_mm [ 1.827748] omap_vc_init_channel: No PMIC info for vdd_mpu [ 1.829137] omap_vp_init: No PMIC info for vdd_mpu [ 1.830975] Power Management for TI OMAP4+ devices. [ 1.832493] ThumbEE CPU extension supported. [ 1.833600] Registering SWP/SWPB emulation handler [ 1.847498] mmc1: new HS200 MMC card at address 0001 [ 1.877853] mmcblk1: mmc1:0001 HBG4a2 29.1 GiB [ 1.887480] vdd_wilink: supplied by vsys [ 1.890160] mmcblk1boot0: mmc1:0001 HBG4a2 partition 1 4.00 MiB [ 1.899658] palmas 0-0048: Irq flag is 0x00000000 [ 1.902809] mmcblk1boot1: mmc1:0001 HBG4a2 partition 2 4.00 MiB [ 1.929353] ata1: SATA link down (SStatus 0 SControl 300) [ 1.942354] palmas 0-0048: Muxing GPIO 3, PWM 0, LED 0 [ 1.954247] palmas-usb 48070000.i2c:palmas@48:palmas_usb: USB-HOST cable is detached [ 1.964761] palmas-rtc 48070000.i2c:palmas@48:rtc: rtc core: registered 48070000.i2c:palmas as rtc0 [ 1.967763] random: fast init done [ 1.991180] SMPS6: supplied by vsys [ 1.995328] SMPS7: supplied by vsys [ 1.998471] vdds_1v8_main: supplied by smps7 [ 2.001423] SMPS8: supplied by vsys [ 2.005907] SMPS9: supplied by vsys [ 2.007493] smps9: Bringing 0uV into 2100000-2100000uV [ 2.016303] LDO1: supplied by vsys [ 2.017889] ldo1: Bringing 0uV into 1800000-1800000uV [ 2.022148] LDO2: supplied by vsys [ 2.025790] LDO3: supplied by vdds_1v8_main [ 2.030299] LDO4: supplied by vdds_1v8_main [ 2.032025] ldo4: Bringing 0uV into 1800000-1800000uV [ 2.036380] LDO5: supplied by vsys [ 2.040803] LDO6: supplied by vdds_1v8_main [ 2.046944] LDO7: supplied by vsys [ 2.048484] ldo7: Bringing 0uV into 2000000-2000000uV [ 2.052774] LDO8: supplied by vsys [ 2.061295] LDOLN: supplied by vsys [ 2.065823] LDOUSB: supplied by vsys [ 2.074044] vcc_3v3_sdio: supplied by regen3 [ 2.075920] ldo9: supplied by vcc_3v3_sdio [ 2.092464] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz [ 2.100389] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz [ 2.108137] omap_i2c 48060000.i2c: bus 2 rev0.12 at 400 kHz [ 2.113892] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz [ 2.118865] pca953x_setup_gpio [ 2.149055] pca953x_irq_setup 1 [ 2.149875] pca953x_irq_setup hack for ts3a227 [ 2.151734] pca953x_irq_setup 2 [ 2.152793] pca953x_irq_bus_lock [ 2.153751] pca953x_irq_bus_sync_unlock [ 2.154929] pca953x_irq_bus_lock [ 2.155753] pca953x_irq_bus_sync_unlock [ 2.156976] pca953x_irq_bus_lock [ 2.157801] pca953x_irq_bus_sync_unlock [ 2.158945] pca953x_irq_bus_lock [ 2.159768] pca953x_irq_bus_sync_unlock [ 2.160924] pca953x_irq_bus_lock [ 2.161748] pca953x_irq_bus_sync_unlock [ 2.162892] pca953x_irq_bus_lock [ 2.163716] pca953x_irq_bus_sync_unlock [ 2.164861] pca953x_irq_bus_lock [ 2.165684] pca953x_irq_bus_sync_unlock [ 2.166861] pca953x_irq_bus_lock [ 2.167684] pca953x_irq_bus_sync_unlock [ 2.168837] pca953x_irq_bus_lock [ 2.169662] pca953x_irq_bus_sync_unlock [ 2.170816] pca953x_irq_bus_lock [ 2.171640] pca953x_irq_bus_sync_unlock [ 2.172784] pca953x_irq_bus_lock [ 2.173606] pca953x_irq_bus_sync_unlock [ 2.174750] pca953x_irq_bus_lock [ 2.175574] pca953x_irq_bus_sync_unlock [ 2.176788] pca953x_irq_bus_lock [ 2.177613] pca953x_irq_bus_sync_unlock [ 2.178757] pca953x_irq_bus_lock [ 2.179580] pca953x_irq_bus_sync_unlock [ 2.180734] pca953x_irq_bus_lock [ 2.181557] pca953x_irq_bus_sync_unlock [ 2.182705] pca953x_irq_bus_lock [ 2.183529] pca953x_irq_bus_sync_unlock [ 2.184674] pca953x_irq_bus_lock [ 2.185497] pca953x_irq_bus_sync_unlock [ 2.186665] pca953x_irq_bus_lock [ 2.187489] pca953x_irq_bus_sync_unlock [ 2.188633] pca953x_irq_bus_lock [ 2.189456] pca953x_irq_bus_sync_unlock [ 2.190610] pca953x_irq_bus_lock [ 2.191432] pca953x_irq_bus_sync_unlock [ 2.192574] pca953x_irq_bus_lock [ 2.193397] pca953x_irq_bus_sync_unlock [ 2.194541] pca953x_irq_bus_lock [ 2.195365] pca953x_irq_bus_sync_unlock [ 2.196582] pca953x_irq_bus_lock [ 2.197406] pca953x_irq_bus_sync_unlock [ 2.198569] pca953x_irq_bus_lock [ 2.199392] pca953x_irq_bus_sync_unlock [ 2.200408] pca953x_probe mask=00 [ 2.201249] pca953x_probe mask=40 [ 2.202090] pca953x_probe mask=00 [ 2.204928] omap_i2c 4807c000.i2c: bus 4 rev0.12 at 400 kHz [ 2.216347] omap_hsmmc 4809c000.mmc: Got CD GPIO [ 2.217656] omap_hsmmc 4809c000.mmc: requested fclk 128000 kHz, got 96000 kHz [ 2.297393] omap_hsmmc 480ad000.mmc: allocated mmc-pwrseq [ 2.299178] omap_hsmmc 480ad000.mmc: requested fclk 52000 kHz, got 48000 kHz [ 2.466895] omap_hsmmc 480d1000.mmc: Got CD GPIO [ 2.468103] omap_hsmmc 480d1000.mmc: Got WP GPIO [ 2.469376] omap_hsmmc 480d1000.mmc: requested fclk 52000 kHz, got 48000 kHz [ 2.822300] input: user-button as /devices/platform/user-button/input/input0 [ 2.836308] input: pyra-gpio-keys@1 as /devices/platform/pyra-gpio-keys@1/input/input1 [ 2.840865] input: pyra-gpio-keys@2 as /devices/platform/pyra-gpio-keys@2/input/input2 [ 2.845452] palmas-rtc 48070000.i2c:palmas@48:rtc: setting system clock to 2017-08-19 14:30:59 UTC (1503153059) [ 2.848814] bt_power: disabling [ 2.850714] ldo3: disabling [ 2.852595] ldo8: disabling [ 2.853740] modem_vbus_power: disabling [ 2.854718] ALSA device list: [ 2.855473] No soundcards found. [ 3.353488] omap_hsmmc 480ad000.mmc: card claims to support voltages below defined range [ 3.365231] Waiting for root device /dev/mmcblk0p1... [ 3.387042] mmc2: new high speed SDIO card at address 0001 [ 3.426118] mmc0: host does not support reading read-only switch, assuming write-enable [ 3.438907] mmc0: new ultra high speed SDR104 SDHC card at address 59b4 [ 3.442819] mmcblk0: mmc0:59b4 RUNSD 29.5 GiB [ 3.447729] mmcblk0: p1 [ 3.479492] EXT4-fs (mmcblk0p1): mounted filesystem with ordered data mode. Opts: (null) [ 3.481659] VFS: Mounted root (ext4 filesystem) readonly on device 179:1. [ 3.491829] devtmpfs: mounted [ 3.496460] Freeing unused kernel memory: 2048K
Matthijs
-
Lokesh Vutla -
Matthijs van Duin -
Nishanth Menon -
Tony Lindgren