Hi, looks as if we have some significant progress!
I did take the last code where we calculated the register values ourselves (not the spreadsheets from Solomon)
But this time I swapped the sequence how the video stream is enabled.
Now, I enable the panel first (0xff 0x01 + some DCS commands), then switch back to ssd2850 mode (0xff 0x00). Then enable the video stream and finally send DCS command 0x29.
So what mainly has changed is that I do not try to send a 0xff command while the video stream on.
Now here the results:
a) with rotation enabled http://download.goldelico.com/DragonFly/files/DSC02227.JPG
b) without rotation http://download.goldelico.com/DragonFly/files/DSC02228.JPG
c) with “BIST” mode of the ssd2858 enabled (which I have learned today that it exists) http://download.goldelico.com/DragonFly/files/MOV02229.AVI (1MB)
The results are encouraging!
What I observe: * RGB to the panel works, i.e. the ssd MIPITX is driving the panel almost correctly * we can now really exclude hardware bugs * panel sync is not stable (with rotation enabled) * if I write directly to the framebuffer I do not see a response (which means RAM writing is not completely ok) * but there is a difference between no rotation and rotation
I will forward to Patrick from Solomon tomorrow.
BR, Nikolaus
latest driver changes:
http://git.goldelico.com/?p=gta04-kernel.git;a=shortlog;h=refs/heads/work/hn...
Hi,
On Mon, Apr 27, 2015 at 11:28 PM, Dr. H. Nikolaus Schaller hns@goldelico.com wrote:
Hi, looks as if we have some significant progress!
I did take the last code where we calculated the register values ourselves (not the spreadsheets from Solomon)
But this time I swapped the sequence how the video stream is enabled.
Now, I enable the panel first (0xff 0x01 + some DCS commands), then switch back to ssd2850 mode (0xff 0x00). Then enable the video stream and finally send DCS command 0x29.
So what mainly has changed is that I do not try to send a 0xff command while the video stream on.
Now here the results:
a) with rotation enabled http://download.goldelico.com/DragonFly/files/DSC02227.JPG
b) without rotation http://download.goldelico.com/DragonFly/files/DSC02228.JPG
Looks promising.
c) with “BIST” mode of the ssd2858 enabled (which I have learned today that it exists) http://download.goldelico.com/DragonFly/files/MOV02229.AVI (1MB)
No permission to download this file.
The results are encouraging!
What I observe:
- RGB to the panel works, i.e. the ssd MIPITX is driving the panel almost correctly
- we can now really exclude hardware bugs
Something like lane lines could still be mixed up, couldn't it?
Gražvydas
Am 28.04.2015 um 11:24 schrieb Grazvydas Ignotas notasas@gmail.com:
Hi,
On Mon, Apr 27, 2015 at 11:28 PM, Dr. H. Nikolaus Schaller hns@goldelico.com wrote:
Hi, looks as if we have some significant progress!
I did take the last code where we calculated the register values ourselves (not the spreadsheets from Solomon)
But this time I swapped the sequence how the video stream is enabled.
Now, I enable the panel first (0xff 0x01 + some DCS commands), then switch back to ssd2850 mode (0xff 0x00). Then enable the video stream and finally send DCS command 0x29.
So what mainly has changed is that I do not try to send a 0xff command while the video stream on.
Now here the results:
a) with rotation enabled http://download.goldelico.com/DragonFly/files/DSC02227.JPG
b) without rotation http://download.goldelico.com/DragonFly/files/DSC02228.JPG
Looks promising.
c) with “BIST” mode of the ssd2858 enabled (which I have learned today that it exists) http://download.goldelico.com/DragonFly/files/MOV02229.AVI (1MB)
No permission to download this file.
fixed (for unknown reasons such movies are imported with 0600 mode - and I forget to fix it manually).
The results are encouraging!
What I observe:
- RGB to the panel works, i.e. the ssd MIPITX is driving the panel almost correctly
- we can now really exclude hardware bugs
Something like lane lines could still be mixed up, couldn’t it?
Yes, could be. So far we use only lane1 because only that one is used for low speed communication. If there is a bug on the other lanes, high speed OMAP->SSD will be broken. It could als be that we need some adjustments for the MIPIRX.
I will try to check.
BR, Nikolaus
Am 28.04.2015 um 11:24 schrieb Grazvydas Ignotas notasas@gmail.com:
Something like lane lines could still be mixed up, couldn't it?
You were right :) :)
The FFC connector for the display cable from main board to ssd was not properly closed. So one or two MIPI lanes did not have connection :( :(
Now, I can influence the (sometimes noisy and disturbed) image (rotated or not) by writing /dev/zero or /dev/urandom to /dev/fb0.
Which means that some video is going though!!!
And I can switch rotation (if flicker has disappeared):
Regarding the panel flicker pattern, it depends and can be changed by plugging an USB stick into the USB socket…
So I think it is a (already known) hardware problem: the DC/DC converter for the USB sockets makes too much noise on the GND lines (is lacking a capacitor).
So it is not an issue of MIPI or the SSD but noise from elsewhere is injected.
I have to recompile the kernel (or DT) to switch them off.
The HW issue is planned to be fixed for the next iteration of the main board.
BR, Nikolaus
Ok, latest finding: the remaining problems are in two areas:
a) power supply issue
If I connect the pandora battery or some USB power, the flicker effects are gone! If I operate main board + display from the EVM, I have these problems.
And I can even see a shifted/clipped image in non-rotated mode and something that appears to be related to the video stream in rotation mode.
So I have to find out/fix this hardware related issue. Maybe the ssd draws quite some current if video is enabled?
Although we will not have the EVM in the final Pyra, we must fix this anyways as it could also appear in low-battery situations.
b) shift&distortion this should not be too difficult to fix as soon as power is stable
BR, Nikolaus
Am 28.04.2015 um 12:01 schrieb Dr. H. Nikolaus Schaller hns@goldelico.com:
Am 28.04.2015 um 11:24 schrieb Grazvydas Ignotas notasas@gmail.com:
Something like lane lines could still be mixed up, couldn't it?
You were right :) :)
The FFC connector for the display cable from main board to ssd was not properly closed. So one or two MIPI lanes did not have connection :( :(
Now, I can influence the (sometimes noisy and disturbed) image (rotated or not) by writing /dev/zero or /dev/urandom to /dev/fb0.
Which means that some video is going though!!!
And I can switch rotation (if flicker has disappeared):
<DSC02232.jpeg>
<DSC02233.jpeg>
Regarding the panel flicker pattern, it depends and can be changed by plugging an USB stick into the USB socket…
So I think it is a (already known) hardware problem: the DC/DC converter for the USB sockets makes too much noise on the GND lines (is lacking a capacitor).
So it is not an issue of MIPI or the SSD but noise from elsewhere is injected.
I have to recompile the kernel (or DT) to switch them off.
The HW issue is planned to be fixed for the next iteration of the main board.
BR, Nikolaus_______________________________________________ Kernel mailing list Kernel@pyra-handheld.com http://pyra-handheld.com/cgi-bin/mailman/listinfo/kernel