[PATCH v5 0/8] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more)
* reworked YAML bindings to pass dt_binding_check and be better grouped * rename all nodes to "gpu: gpu@<address>" * removed "img,sgx5" from example - suggested by Rob Herring robh+dt@kernel.org
PATCH V4 2019-12-17 19:02:11: * MIPS: DTS: jz4780: removed "img,sgx5" from bindings * YAML bindings: updated according to suggestions by Rob Herring * MIPS: DTS: jz4780: insert-sorted gpu node by register address - suggested by Paul Cercueil
PATCH V3 2019-11-24 12:40:33: * reworked YAML format with help by Rob Herring * removed .txt binding document * change compatible "ti,am335x-sgx" to "ti,am3352-sgx" - suggested by Tony Lindgren
PATCH V2 2019-11-07 12:06:17: * tried to convert bindings to YAML format - suggested by Rob Herring * added JZ4780 DTS node (proven to load the driver) * removed timer and img,cores properties until we know we really need them - suggested by Rob Herring
PATCH V1 2019-10-18 20:46:35:
This patch series defines child nodes for the SGX5xx interface inside different SoC so that a driver can be found and probed by the compatible strings and can retrieve information about the SGX revision that is included in a specific SoC. It also defines the interrupt number to be used by the SGX driver.
There is currently no mainline driver for these GPUs, but a project [1] is ongoing with the goal to get the open-source part as provided by TI/IMG and others into drivers/gpu/drm/pvrsgx.
The kernel modules built from this project have successfully demonstrated to work with the DTS definitions from this patch set on AM335x BeagleBone Black, DM3730 and OMAP5 Pyra and Droid 4. They partially work on OMAP3530 and PandaBoard ES but that is likely a problem in the kernel driver or the (non-free) user-space libraries and binaries.
Wotk for JZ4780 (CI20 board) is in progress and there is potential to extend this work to e.g. BananaPi-M3 (A83) and some Intel Poulsbo and CedarView devices.
[1]: https://github.com/openpvrsgx-devgroup
H. Nikolaus Schaller (8): dt-bindings: add img,pvrsgx.yaml for Imagination GPUs ARM: DTS: am33xx: add sgx gpu child node ARM: DTS: am3517: add sgx gpu child node ARM: DTS: omap34xx: add sgx gpu child node ARM: DTS: omap36xx: add sgx gpu child node ARM: DTS: omap4: add sgx gpu child node ARM: DTS: omap5: add sgx gpu child node MIPS: DTS: jz4780: add sgx gpu node
.../devicetree/bindings/gpu/img,pvrsgx.yaml | 109 ++++++++++++++++++ arch/arm/boot/dts/am33xx.dtsi | 11 +- arch/arm/boot/dts/am3517.dtsi | 9 +- arch/arm/boot/dts/omap34xx.dtsi | 11 +- arch/arm/boot/dts/omap36xx.dtsi | 9 +- arch/arm/boot/dts/omap4.dtsi | 11 +- arch/arm/boot/dts/omap4470.dts | 15 +++ arch/arm/boot/dts/omap5.dtsi | 11 +- arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 ++ 9 files changed, 169 insertions(+), 28 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml create mode 100644 arch/arm/boot/dts/omap4470.dts
The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, Allwinner A83 and others.
With this binding, we describe how the SGX processor is interfaced to the SoC (registers, interrupt etc.).
In most cases, Clock, Reset and power management is handled by a parent node or elsewhere (e.g. code in the driver).
Tested by make dt_binding_check dtbs_check
Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- .../devicetree/bindings/gpu/img,pvrsgx.yaml | 109 ++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml new file mode 100644 index 000000000000..aadfb2d9b012 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Imagination PVR/SGX GPU + +maintainers: + - H. Nikolaus Schaller hns@goldelico.com + +description: |+ + This binding describes the Imagination SGX5 series of 3D accelerators which + are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780, + Allwinner A83, and Intel Poulsbo and CedarView and more. + + For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations + + The SGX node is usually a child node of some DT node belonging to the SoC + which handles clocks, reset and general address space mapping of the SGX + register area. + +properties: + compatible: + oneOf: + - description: SGX530-121 based SoC + items: + - enum: + - ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar + - const: img,sgx530-121 + - const: img,sgx530 + + - description: SGX530-125 based SoC + items: + - enum: + - ti,am3352-sgx530-125 # BeagleBone Black + - ti,am3517-sgx530-125 + - ti,am4-sgx530-125 + - ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar + - ti,ti81xx-sgx530-125 + - const: ti,omap3-sgx530-125 + - const: img,sgx530-125 + - const: img,sgx530 + + - description: SGX535-116 based SoC + items: + - const: intel,poulsbo-gma500-sgx535 # Atom Z5xx + - const: img,sgx535-116 + - const: img,sgx535 + + - description: SGX540-116 based SoC + items: + - const: intel,medfield-gma-sgx540 # Atom Z24xx + - const: img,sgx540-116 + - const: img,sgx540 + + - description: SGX540-120 based SoC + items: + - enum: + - ingenic,jz4780-sgx540-120 # CI20 + - ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar + - const: img,sgx540-120 + - const: img,sgx540 + + - description: SGX544-112 based SoC + items: + - const: ti,omap4-sgx544-112 + - const: img,sgx544-112 + - const: img,sgx544 + + - description: SGX544-116 based SoC + items: + - enum: + - allwinner,sun8i-a83t-sgx544-116 # Banana-Pi-M3 (Allwinner A83T) and similar + - ti,dra7-sgx544-116 # DRA7 + - ti,omap5-sgx544-116 # OMAP5 UEVM, Pyra Handheld and similar + - const: img,sgx544-116 + - const: img,sgx544 + + - description: SGX545-116 based SoC + items: + - const: intel,cedarview-gma3600-sgx545 # Atom N2600, D2500 + - const: img,sgx545-116 + - const: img,sgx545 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - |+ + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu: gpu@fe00 { + compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544"; + reg = <0xfe00 0x200>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + }; + +...
Am 29.03.2020 um 19:38 schrieb H. Nikolaus Schaller hns@goldelico.com:
The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, Allwinner A83 and others.
With this binding, we describe how the SGX processor is interfaced to the SoC (registers, interrupt etc.).
In most cases, Clock, Reset and power management is handled by a parent node or elsewhere (e.g. code in the driver).
Tested by make dt_binding_check dtbs_check
Signed-off-by: H. Nikolaus Schaller hns@goldelico.com
.../devicetree/bindings/gpu/img,pvrsgx.yaml | 109 ++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml new file mode 100644 index 000000000000..aadfb2d9b012 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Imagination PVR/SGX GPU
+maintainers:
- H. Nikolaus Schaller hns@goldelico.com
+description: |+
- This binding describes the Imagination SGX5 series of 3D accelerators which
- are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780,
- Allwinner A83, and Intel Poulsbo and CedarView and more.
- For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations
- The SGX node is usually a child node of some DT node belonging to the SoC
- which handles clocks, reset and general address space mapping of the SGX
- register area.
+properties:
- compatible:
- oneOf:
- description: SGX530-121 based SoCitems:- enum:- ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar- const: img,sgx530-121- const: img,sgx530- description: SGX530-125 based SoCitems:- enum:- ti,am3352-sgx530-125 # BeagleBone Black- ti,am3517-sgx530-125- ti,am4-sgx530-125- ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar- ti,ti81xx-sgx530-125- const: ti,omap3-sgx530-125- const: img,sgx530-125- const: img,sgx530- description: SGX535-116 based SoCitems:- const: intel,poulsbo-gma500-sgx535 # Atom Z5xx- const: img,sgx535-116- const: img,sgx535- description: SGX540-116 based SoCitems:- const: intel,medfield-gma-sgx540 # Atom Z24xx- const: img,sgx540-116- const: img,sgx540- description: SGX540-120 based SoCitems:- enum:- ingenic,jz4780-sgx540-120 # CI20- ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar- const: img,sgx540-120- const: img,sgx540- description: SGX544-112 based SoCitems:- const: ti,omap4-sgx544-112- const: img,sgx544-112- const: img,sgx544- description: SGX544-116 based SoCitems:- enum:- allwinner,sun8i-a83t-sgx544-116 # Banana-Pi-M3 (Allwinner A83T) and similar
Philipp Rossak reported on a different list [1] that the a83t tells to have a sgx544-115 inside.
So it needs a separate entry.
[1]: http://lists.goldelico.com/pipermail/openpvrsgx-devgroup/2020-April/000263.h...
- ti,dra7-sgx544-116 # DRA7- ti,omap5-sgx544-116 # OMAP5 UEVM, Pyra Handheld and similar- const: img,sgx544-116- const: img,sgx544- description: SGX545-116 based SoCitems:- const: intel,cedarview-gma3600-sgx545 # Atom N2600, D2500- const: img,sgx545-116- const: img,sgx545- reg:
- maxItems: 1
- interrupts:
- maxItems: 1
+required:
- compatible
- reg
- interrupts
+additionalProperties: false
+examples:
- |+
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- gpu: gpu@fe00 {
compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544";reg = <0xfe00 0x200>;interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;- };
+...
2.25.1
On Tue, Apr 07, 2020 at 09:00:48AM +0200, H. Nikolaus Schaller wrote:
Am 29.03.2020 um 19:38 schrieb H. Nikolaus Schaller hns@goldelico.com:
The Imagination PVR/SGX GPU is part of several SoC from multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo, Allwinner A83 and others.
With this binding, we describe how the SGX processor is interfaced to the SoC (registers, interrupt etc.).
In most cases, Clock, Reset and power management is handled by a parent node or elsewhere (e.g. code in the driver).
Tested by make dt_binding_check dtbs_check
Signed-off-by: H. Nikolaus Schaller hns@goldelico.com
.../devicetree/bindings/gpu/img,pvrsgx.yaml | 109 ++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml
diff --git a/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml new file mode 100644 index 000000000000..aadfb2d9b012 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/img,pvrsgx.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/img,pvrsgx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Imagination PVR/SGX GPU
+maintainers:
- H. Nikolaus Schaller hns@goldelico.com
+description: |+
- This binding describes the Imagination SGX5 series of 3D accelerators which
- are found in several different SoC like TI OMAP, Sitara, Ingenic JZ4780,
- Allwinner A83, and Intel Poulsbo and CedarView and more.
- For an extensive list see: https://en.wikipedia.org/wiki/PowerVR#Implementations
- The SGX node is usually a child node of some DT node belonging to the SoC
- which handles clocks, reset and general address space mapping of the SGX
- register area.
+properties:
- compatible:
- oneOf:
- description: SGX530-121 based SoCitems:- enum:- ti,omap3-sgx530-121 # BeagleBoard A/B/C, OpenPandora 600MHz and similar- const: img,sgx530-121- const: img,sgx530- description: SGX530-125 based SoCitems:- enum:- ti,am3352-sgx530-125 # BeagleBone Black- ti,am3517-sgx530-125- ti,am4-sgx530-125- ti,omap3-sgx530-125 # BeagleBoard XM, GTA04, OpenPandora 1GHz and similar- ti,ti81xx-sgx530-125- const: ti,omap3-sgx530-125- const: img,sgx530-125- const: img,sgx530- description: SGX535-116 based SoCitems:- const: intel,poulsbo-gma500-sgx535 # Atom Z5xx- const: img,sgx535-116- const: img,sgx535- description: SGX540-116 based SoCitems:- const: intel,medfield-gma-sgx540 # Atom Z24xx- const: img,sgx540-116- const: img,sgx540- description: SGX540-120 based SoCitems:- enum:- ingenic,jz4780-sgx540-120 # CI20- ti,omap4-sgx540-120 # Pandaboard, Pandaboard ES and similar- const: img,sgx540-120- const: img,sgx540- description: SGX544-112 based SoCitems:- const: ti,omap4-sgx544-112- const: img,sgx544-112- const: img,sgx544- description: SGX544-116 based SoCitems:- enum:- allwinner,sun8i-a83t-sgx544-116 # Banana-Pi-M3 (Allwinner A83T) and similarPhilipp Rossak reported on a different list [1] that the a83t tells to have a sgx544-115 inside.
So it needs a separate entry.
Okay, it looks fine otherwise.
Rob
and add interrupt.
Tested-by: H. Nikolaus Schaller hns@goldelico.com # BeagleBone Black Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/arm/boot/dts/am33xx.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 41dcfb37155a..cbdd85a1e4b0 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -497,7 +497,7 @@ aes: aes@0 { }; };
- target-module@56000000 { + sgx_module: target-module@56000000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x5600fe00 0x4>, <0x5600fe10 0x4>; @@ -516,10 +516,11 @@ target-module@56000000 { #size-cells = <1>; ranges = <0 0x56000000 0x1000000>;
- /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + gpu: gpu@0 { + compatible = "ti,am3352-sgx530-125", "img,sgx530-125", "img,sgx530"; + reg = <0x00 0x1000000>; /* 16 MB */ + interrupts = <37>; + }; }; }; };
and add interrupt.
Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/arm/boot/dts/am3517.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi index e0b5a00e2078..3fce56a646d1 100644 --- a/arch/arm/boot/dts/am3517.dtsi +++ b/arch/arm/boot/dts/am3517.dtsi @@ -138,10 +138,11 @@ sgx_module: target-module@50000000 { #size-cells = <1>; ranges = <0 0x50000000 0x4000>;
- /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + gpu: gpu@0 { + compatible = "ti,am3517-sgx530-125", "img,sgx530-125", "img,sgx530"; + reg = <0x0 0x4000>; + interrupts = <21>; + }; }; }; };
and add interrupt.
According to omap3530 TRM the SGX register block is 64kB. See: 13.4 SGX Register Mapping, Table 13-2
Reported-by: Andrew F. Davis afd@ti.com # register size Tested-by: H. Nikolaus Schaller hns@goldelico.com # OpenPandora 600 MHz. Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/arm/boot/dts/omap34xx.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi index c4dd9801840d..51c60ee2b68d 100644 --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -167,12 +167,13 @@ sgx_module: target-module@50000000 { clock-names = "fck", "ick"; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x50000000 0x4000>; + ranges = <0 0x50000000 0x10000>;
- /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + gpu: gpu@0 { + compatible = "ti,omap3-sgx530-121", "img,sgx530-121", "img,sgx530"; + reg = <0x0 0x10000>; /* 64kB */ + interrupts = <21>; + }; }; };
and add interrupt.
Tested-by: H. Nikolaus Schaller hns@goldelico.com # GTA04, BeagleBoard XM Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/arm/boot/dts/omap36xx.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 71f3c8f1f924..b308dbb3b1bb 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -211,10 +211,11 @@ sgx_module: target-module@50000000 { #size-cells = <1>; ranges = <0 0x50000000 0x2000000>;
- /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + gpu: gpu@0 { + compatible = "ti,omap3-sgx530-125", "img,sgx530-125", "img,sgx530"; + reg = <0x0 0x10000>; /* 64kB */ + interrupts = <21>; + }; }; };
and add interrupt.
Since omap4420/30/60 and omap4470 come with different SGX variants we need to introduce a new omap4470.dtsi. If an omap4470 board does not want to use SGX it is no problem to still include omap4460.dtsi.
Tested-by: H. Nikolaus Schaller hns@goldelico.com # PandaBoard ES Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/arm/boot/dts/omap4.dtsi | 11 ++++++----- arch/arm/boot/dts/omap4470.dts | 15 +++++++++++++++ 2 files changed, 21 insertions(+), 5 deletions(-) create mode 100644 arch/arm/boot/dts/omap4470.dts
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 9a87440d0b9d..939061f96523 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -390,7 +390,7 @@ abb_iva: regulator-abb-iva { status = "disabled"; };
- target-module@56000000 { + sgx_module: target-module@56000000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x5600fe00 0x4>, <0x5600fe10 0x4>; @@ -409,10 +409,11 @@ target-module@56000000 { #size-cells = <1>; ranges = <0 0x56000000 0x2000000>;
- /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + gpu: gpu@0 { + compatible = "ti,omap4-sgx540-120", "img,sgx540-120", "img,sgx540"; + reg = <0x0 0x2000000>; /* 32MB */ + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + }; };
dss: dss@58000000 { diff --git a/arch/arm/boot/dts/omap4470.dts b/arch/arm/boot/dts/omap4470.dts new file mode 100644 index 000000000000..19b554612401 --- /dev/null +++ b/arch/arm/boot/dts/omap4470.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Device Tree Source for OMAP4470 SoC + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ +#include "omap4460.dtsi" + +&sgx { + compatible = "img,sgx544-112", "img,sgx544", "ti,omap-omap4-sgx544-112"; +};
and add interrupt.
Tested-by: H. Nikolaus Schaller hns@goldelico.com # Pyra-Handheld. Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/arm/boot/dts/omap5.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index d0ecf54d5a23..4c7c4ca0bd87 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -269,7 +269,7 @@ sata: sata@4a141100 { ports-implemented = <0x1>; };
- target-module@56000000 { + sgx_module: target-module@56000000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x5600fe00 0x4>, <0x5600fe10 0x4>; @@ -286,10 +286,11 @@ target-module@56000000 { #size-cells = <1>; ranges = <0 0x56000000 0x2000000>;
- /* - * Closed source PowerVR driver, no child device - * binding or driver in mainline - */ + gpu: gpu@0 { + compatible = "ti,omap5-sgx544-116", "img,sgx544-116", "img,sgx544"; + reg = <0x0 0x10000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + }; };
dss: dss@58000000 {
and add interrupt and clocks.
Tested to build for CI20 board and load a driver. Setup can not yet be tested since there is no working HDMI driver for jz4780.
Suggested-by: Paul Boddie paul@boddie.org.uk Tested-by: H. Nikolaus Schaller hns@goldelico.com # CI20. Signed-off-by: H. Nikolaus Schaller hns@goldelico.com --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index bb89653d16a3..618e48c78a87 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -357,6 +357,17 @@ i2c4: i2c@10054000 { status = "disabled"; };
+ gpu: gpu@13040000 { + compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120", "img,sgx540"; + reg = <0x13040000 0x4000>; + + clocks = <&cgu JZ4780_CLK_GPU>; + clock-names = "gpu"; + + interrupt-parent = <&intc>; + interrupts = <63>; + }; + nemc: nemc@13410000 { compatible = "ingenic,jz4780-nemc"; reg = <0x13410000 0x10000>;
-
H. Nikolaus Schaller -
Rob Herring