17 Aug
2017
17 Aug
'17
3:58 p.m.
On 17 August 2017 at 17:48, Tony Lindgren tony@atomide.com wrote:
We have omap_ddr_clk() return 531840000 in u-boot, so not 400 MHz. But since the current timings work at 1.42V, I don't see why they would need to be tweaked for 1.35V.
They shouldn't have to be. I'm not sure why 400 MHz was brought up in the first place, I assumed perhaps as experiment (although I'm not sure what exactly we would learn from it).