* H. Nikolaus Schaller hns@goldelico.com [170828 08:24]:
Hi, finally I am back in office and tried to make it working.
But I can't boot with this setup. RAM is "not working" which indicates subtle parameter variations.
U-Boot SPL 2016.11-00248-g0249324 (Aug 28 2017 - 15:11:23) OMAP5432-GP ES2.0 SDRAM: identified size not same as expected size identified: 0 expected: 40000000
spl:board_init_r()
spl_init() Trying to boot from MMC1 WARNING: DDR RAM is not working! (12000000) Found LC15 V5.1 board_mmc_init called (vers = 51) MLO hard: gpio7 = eMMC soft: gpio82 = 0 (mmc1=eMMC) ctrl: gpio76 = 1 (ctrl=soft)
Should I try a different patch set?
Just the "Pyra/LC15: Proof of concept ddr3 max timings for 1.35V" is enough for me. And in that patch the ref_ctrl value of anything around 4 x 0x1035 seems to work. No idea why the ref_ctrl must be off that much..
The second patch is not needed at all as pointed out by Matthijs as the interleaving is already enabled.
Regards,
Tony