10 Nov
2016
10 Nov
'16
6:30 p.m.
Here is another random idea:
perhaps because of different capacitor setup (compared to uEVM) the voltage needs more time to ramp up. Something like attached patch could be used to find out. It would also be interesting to find out if it crashes on regulator_set_voltage() or clk_set_rate(), which could be found by increasing sleep to a very high value and adding some prints. If the former, it could mean something bad happens during the voltage change.
Gražvydas