Am 11.11.2016 um 21:19 schrieb Michael Mrozek EvilDragon@openpandora.org:
Hi,
while looking at the different voltages, I found another value that spawned my interest:
clock-latency = <300000>;
Does anyone know what that value is and what it could be used for?
It appears as if it is here:
http://lxr.free-electrons.com/source/arch/arm/boot/dts/omap5.dtsi#L55
The description is here:
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/power...
as
"- clock-latency-ns: Specifies the maximum possible transition latency (in nanoseconds) for switching to this OPP from any other OPP."
So it has to do something with clock frequency switching! Good finding!
The value given above would be 300µs. But is this too long or too short?
Hm. There is some discrepancy between the bindings document (-ns suffix) and the DT entry.
I have checked with drivers/base/power/opp/of.c and it appears to handle both variants differently.
I found some discussion on a forum, where someone mentioned it's probably the latency between the clock source pin and the OMAP5 clock pin and therefore depends on board design and trace length.
No idea if that's true, but if yes, could that have an effect in our case?
Interesting!
BR, Nikolaus
PS: I also did some experiments this morning with Notaz' proposed patch and some printk to notify about voltage and clock changes.
But I wasn't successful yet to read something out of it which brings us forward. So I have to rethink the first results to do improved experiments.