On 28 November 2016 at 00:45, Grazvydas Ignotas notasas@gmail.com wrote:
write RAM, even on cache hit) but you can still have no-allocate.
No-allocate is not the same thing as no-write-allocate, it means *never* allocate in cache, not even on read. It's a slightly obscure cache policy and only available when using LPAE since the short descriptor format has no encoding for it.
(The LPAE long descriptor format gives you complete freedom over allocation hint, you can even declare memory to be something crazy like write-through write-allocate no-read-allocate. Of course just because you can ask for it doesn't mean you'll get it.)
From what I see in the manual you can't have write-though
Correct, it treats write-through as non-cacheable. Quite annoying.
Overall it only supports: - strongly-ordered - device - normal, non-cacheable - normal, write-back, no-allocate - normal, write-back, read-write-allocate and I think the only reason it supports no-allocate at all is because it's also implicitly used when you "disable" the caches (which only suppresses allocation) as necessary step of powering down a core.
Add to this the fact it essentially uses a linefill for normal non-cacheable reads (which is what tripped up TILER) and it becomes clear they really wanted to minimize the number of different types of memory transactions used, presumably because it's the first processor with ACE support.
Matthijs