Hi,
from a quick look at the code, it seems it's only actually used by cpufreq to make decisions when to switch frequencies (opp code only passes the value to cpufreq). For example, if the latency is large, it may make sense to wait for longer CPU usage spike before switching to higher frequency to avoid useless switching back and forth.
Gražvydas
On Fri, Nov 11, 2016 at 10:19 PM, Michael Mrozek EvilDragon@openpandora.org wrote:
Hi,
while looking at the different voltages, I found another value that spawned my interest:
clock-latency = <300000>;
Does anyone know what that value is and what it could be used for?
I found some discussion on a forum, where someone mentioned it's probably the latency between the clock source pin and the OMAP5 clock pin and therefore depends on board design and trace length.
No idea if that's true, but if yes, could that have an effect in our case?
-- Mit freundlichen Grüßen,
Michael Mrozek
OpenPandora GmbH Geschäftsführer: Michael Mrozek
Schäffbräustr. 11 85049 Ingolstadt Deutschland Tel.: 0841 / 990 5548 http://www.openpandora.de/ HRB 4879, Amtsgericht Ingolstadt
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