17 Aug
2017
17 Aug
'17
4:34 p.m.
Hi,
We have omap_ddr_clk() return 531840000 in u-boot, so not 400 MHz. But since the current timings work at 1.42V, I don't see why they would need to be tweaked for 1.35V.
So DDR3-1066.
Well, it would still be interesting to try whether they will behave differently with 1.35V if they're running slower.
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Greetings,
Michael Mrozek
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