14 Aug
2017
14 Aug
'17
2:27 p.m.
* Tony Lindgren tony@atomide.com [170814 07:11]:
- Matthijs van Duin matthijsvanduin@gmail.com [170814 02:36]:
On 14 August 2017 at 06:43, Tony Lindgren tony@atomide.com wrote:
+#if 0 .sdram_config_init = 0x61851B3A, .sdram_config = 0x61851B3A, ... +#endif
.sdram_config_init = 0x61851b32,.sdram_config = 0x61851b32,uhh?? bit 3 configures whether there is 1 rank or 2 ranks...
Yeh no idea so far, your settings seem more correct, this is just the raw dump from igepv5 that happens to work..
Maybe bit 3 means two ranks per emif instance here?
The data sheet "3.2 Stacked / Dual - die DDR3 SDRAM x16 Ballout" seems show just one chip select per die? One die per emif?
Regards,
Tony