Am 31.08.2017 um 13:21 schrieb Michael Mrozek EvilDragon@openpandora.org:
Am Mon, 28 Aug 2017 17:27:53 +0200 hat "H. Nikolaus Schaller" hns@goldelico.com geschrieben:
Hi,
One more info from the distributor: As Dual Die chips basically have twice the load, the might need a different combination of resistors and capacitors than Single-Rank chip.
Well, this means signal load i.e. resistors and capacities inside the chip (Si on SiO2 forms resistors and inductors and capacitors as well). So we can't change those.
Ah, okay. Well, signal integrity is fine, so that's not the problem. Or would increasing the driver strength help with noise on the power traces as well?
Can the driver strength be increased by software?
notaz mentioned the EVM has over 44 capacitors for the RAM power traces only... how many do we have and can those be changed / optimized?
We don't have that many but AFAIR there are at least 2 per DDR3 chip. On the latest (not yet populated PCB) there are 13 for 4 chips, i.e. >3 per DDR3 chip.
No idea if increasing that helps to get the 4GB DRAM more stable.
The problem is that I can form hypotheses and explanations for both outcomes :(
+ Basically the 4GB dual die chips may need more decoupling (local energy buffer) for VDD because they draw more current if both chips are active
- On the other hand 2GB RAM works well with much less decoupling than the EVM which also has only 2GB RAM... So 48 is not needed for 2GB.
BR, Nikolaus