On Sat, Sep 7, 2019 at 12:47 PM H. Nikolaus Schaller hns@goldelico.com wrote:
In addition, move omap3 from whitelist to blacklist in cpufreq-dt-platdev in the same patch, because doing either first breaks operation and may make trouble in bisect.
We also can remove opp-v1 table for omap3-n950-n9 since it is now automatically detected.
We also fix a wrong OPP4 voltage for omap3430 which must be 0.6V + 54*12.5mV = 1275mV. Otherwise the twl4030 driver will reject this OPP.
thank you for your work on this. I tested it on a a Logit PD DM3730 Torpedo + Wireless kit, and appears to operate normally, but i have not tested it at temperature.
Tested-by: Adam Ford aford173@gmail.com
Signed-off-by: H. Nikolaus Schaller hns@goldelico.com Acked-by: Tony Lindgren tony@atomide.com
arch/arm/boot/dts/omap3-n950-n9.dtsi | 7 --- arch/arm/boot/dts/omap34xx.dtsi | 65 ++++++++++++++++++++++++---- arch/arm/boot/dts/omap36xx.dtsi | 53 +++++++++++++++++++---- drivers/cpufreq/cpufreq-dt-platdev.c | 2 +- 4 files changed, 102 insertions(+), 25 deletions(-)
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi index 5441e9ffdbb4..e98b0c615f19 100644 --- a/arch/arm/boot/dts/omap3-n950-n9.dtsi +++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi @@ -11,13 +11,6 @@ cpus { cpu@0 { cpu0-supply = <&vcc>;
operating-points = </* kHz uV */300000 1012500600000 1200000800000 13250001000000 1375000>; }; };diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi index f572a477f74c..91154829f86a 100644 --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -16,19 +16,66 @@ / { cpus { cpu: cpu@0 {
/* OMAP343x/OMAP35xx variants OPP1-5 */operating-points = </* kHz uV */125000 975000250000 1075000500000 1200000550000 1270000600000 1350000>;
/* OMAP343x/OMAP35xx variants OPP1-6 */operating-points-v2 = <&cpu0_opp_table>;clock-latency = <300000>; /* From legacy driver */ }; };/* see Documentation/devicetree/bindings/opp/opp.txt */cpu0_opp_table: opp-table {compatible = "operating-points-v2-ti-cpu";syscon = <&scm_conf>;opp1-125000000 {opp-hz = /bits/ 64 <125000000>;/** we currently only select the max voltage from table* Table 3-3 of the omap3530 Data sheet (SPRS507F).* Format is: <target min max>*/opp-microvolt = <975000 975000 975000>;/** first value is silicon revision bit mask* second one 720MHz Device Identification bit mask*/opp-supported-hw = <0xffffffff 3>;};opp2-250000000 {opp-hz = /bits/ 64 <250000000>;opp-microvolt = <1075000 1075000 1075000>;opp-supported-hw = <0xffffffff 3>;opp-suspend;};opp3-500000000 {opp-hz = /bits/ 64 <500000000>;opp-microvolt = <1200000 1200000 1200000>;opp-supported-hw = <0xffffffff 3>;};opp4-550000000 {opp-hz = /bits/ 64 <550000000>;opp-microvolt = <1275000 1275000 1275000>;opp-supported-hw = <0xffffffff 3>;};opp5-600000000 {opp-hz = /bits/ 64 <600000000>;opp-microvolt = <1350000 1350000 1350000>;opp-supported-hw = <0xffffffff 3>;};opp6-720000000 {opp-hz = /bits/ 64 <720000000>;opp-microvolt = <1350000 1350000 1350000>;/* only high-speed grade omap3530 devices */opp-supported-hw = <0xffffffff 2>;};};ocp@68000000 { omap3_pmx_core2: pinmux@480025d8 { compatible = "ti,omap3-padconf", "pinctrl-single";diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 6fb23ada1f64..44f25b0eb45b 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -19,15 +19,52 @@ };
cpus {
/* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
/* OMAP3630/OMAP37xx variants OPP50 to OPP130 and OPP1G */ cpu: cpu@0 {
operating-points = </* kHz uV */300000 1012500600000 1200000800000 1325000>;clock-latency = <300000>; /* From legacy driver */
operating-points-v2 = <&cpu0_opp_table>;clock-latency = <300000>; /* From omap-cpufreq driver */};};/* see Documentation/devicetree/bindings/opp/opp.txt */cpu0_opp_table: opp-table {compatible = "operating-points-v2-ti-cpu";syscon = <&scm_conf>;opp50-300000000 {opp-hz = /bits/ 64 <300000000>;/** we currently only select the max voltage from table* Table 4-19 of the DM3730 Data sheet (SPRS685B)* Format is: <target min max>*/opp-microvolt = <1012500 1012500 1012500>;/** first value is silicon revision bit mask* second one is "speed binned" bit mask*/opp-supported-hw = <0xffffffff 3>;opp-suspend;};opp100-600000000 {opp-hz = /bits/ 64 <600000000>;opp-microvolt = <1200000 1200000 1200000>;opp-supported-hw = <0xffffffff 3>;};opp130-800000000 {opp-hz = /bits/ 64 <800000000>;opp-microvolt = <1325000 1325000 1325000>;opp-supported-hw = <0xffffffff 3>;};opp1g-1000000000 {opp-hz = /bits/ 64 <1000000000>;opp-microvolt = <1375000 1375000 1375000>;/* only on am/dm37x with speed-binned bit set */opp-supported-hw = <0xffffffff 2>; }; };diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 03dc4244ab00..68b7fc4225f8 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -86,7 +86,6 @@ static const struct of_device_id whitelist[] __initconst = { { .compatible = "st-ericsson,u9540", },
{ .compatible = "ti,omap2", },
{ .compatible = "ti,omap3", }, { .compatible = "ti,omap4", }, { .compatible = "ti,omap5", },@@ -132,6 +131,7 @@ static const struct of_device_id blacklist[] __initconst = { { .compatible = "ti,am33xx", }, { .compatible = "ti,am43", }, { .compatible = "ti,dra7", },
{ .compatible = "ti,omap3", }, { }};
2.19.1