* Grazvydas Ignotas notasas@gmail.com [181011 23:20]:
Tony Lindgren's "LC15: Fix flakey ddr3 detection with ref_ctrl and ref_ctrl_final" assumes that 802bb57a584d also affects OMAP5 but it doesn't, which means slower out-of-spec refresh rate is left at the end and .ref_ctrl_final is never written. Let's write it out.
Oh this is a good catch, it means we've been running the memory at a way higher refresh rate than we should need to. It is also interesting that this seems to be somewhat related to the self-refresh?
This change works for me only work if EMIF_POWER_MANAGEMENT_CONTROL is disabled based on few quick experiments, so I wonder what's the relationship with higher non-standard values of EMIF_SDRAM_REFRESH_CONTROL REFRESH_RATE and self-refresh?
Regards,
Tony