* Matthijs van Duin matthijsvanduin@gmail.com [170329 11:25]:
Just a small update on the ABE PLL lockup issue:
I've "installed" R195 (read: I've installed a solder blob there) on the uevm to make it able to experience warm resets normally. I can now reproduce the abe pll lockup there, although it seems to happen quite rarely whereas on the pyra it seems to happen on every reboot.
Interestingly, I've discovered that the ABE PLL is not locking up at warm reset. A register dump in u-boot immediately prior to a lockup in linux shows everything was still fine before control was handed over to linux. It seems linux is somehow managing to get it locked-up while trying to get it locked, and once this happens the lockup is insensitive to warm reset.
Still lots of unanswered questions, but it's a step
Seems the reason why this happens is explained in commit 8c197ccfb600 ("ARM: OMAP4460: Workaround ABE DPLL failing to turn-on"):
"The problem was exposed when u-boot was updated to NOT configure and lock the ABE DPLL on start-up. If the ABE DPLL is configured and locked by u-boot the problem does not occur. However, if the ABE DPLL is in the idle low-power bypass state and we attempt to enable a timer in the ABE power domain, it remains stuck in the disabled state. It appears to be a problem the timer interface clock as this comes from the ABE DPLL.
If we place the ABE DPLL in the MN-bypass state and not the idle low-power state, then this problem is not seen."
So the previous boot idles ABE, and then after reboot DPLL won't lock.
Regards,
Tony