Hi,
Am 08.10.2018 um 05:09 schrieb Michael Mrozek EvilDragon@openpandora.org:
On Fr, 2018-10-05 at 07:49 -0700, Tony Lindgren wrote:
Hi,
hm, that is interesting. I tried to find out a bit about the DLL on the internet (as the memory datasheet simply says that it should never be disabled for production use), but the only I did find it this article about the BIOS setup: https://www.techarp.com/bios-guide/digital-locked-loop-dll/
The interesting: "However, the delay-locked loop circuit of every DDR, DDR2, DDR3 or DDR4 chip is tuned for a certain fixed frequency range. If you run the chip beyond that frequency rate, the DLL circuit may not work correctly. That’s why DDR, DDR2, DDR3 and DDR4 SDRAM chips can have problems running at clock speeds slower than what they are rated for."
That is indeed an interesting finding!
I wonder - what frequency are we running the memory with?
AFAIR, the OMAP5 EMIF runs at 532 MHz while the chips are specified for 1066 (or 1200?) MHz. So that would be half clock rate.
Could it be that frequency is off?
IMHO: yes!
BR, Nikolaus
- H. Nikolaus Schaller hns@goldelico.com [181005 05:36]:
Am 04.10.2018 um 19:13 schrieb Michael Mrozek < EvilDragon@openpandora.org>: On Do, 2018-10-04 at 09:41 +0200, Michael Mrozek wrote:
- It also freezes but not that fast when no drivers are loaded
(when it's still idling).
So, here is my idea: Could it be that the freeze happens when the OMAP switches between voltages / frequencies (well, not always but sometimes)? Or maybe if it switches to ONE special voltage / frequency?
I have tried that before without seeing a difference.
Well for the idle freezing issue, curiously the old "disable internal dll" trick seems to work. At least for me the system keeps running just fine idling for several hours.
Also, looks like we have SDRAM_CONFIG ROWSIZE bits [9:7] set to 15 while it should be 16 for 8Gb memory. But I think that is just cosmetic, not sure if that is actually used.
Anyways, care to test with the following hack with internal dll disabled and ROWSIZE fixed?
If that works for the idle system problem, then we probably have some DLL timing related value misconfigured.
Regards,
Tony
8< -------------- diff --git a/board/goldelico/letux-cortex15/lc15.c b/board/goldelico/letux-cortex15/lc15.c --- a/board/goldelico/letux-cortex15/lc15.c +++ b/board/goldelico/letux-cortex15/lc15.c @@ -37,8 +37,8 @@ const struct omap_sysinfo sysinfo = { */
const struct emif_regs emif_regs_ddr3_532_mhz_2cs_es2 = {
- .sdram_config_init = 0x61851B3A,
- .sdram_config = 0x61851B3A,
- .sdram_config_init = 0x61951BBA,
- .sdram_config = 0x61951BBA, .sdram_config2 = 0x0, .ref_ctrl = 0x000040F1, .ref_ctrl_final = 0x00001035,
-- Mit freundlichen Grüßen,
Michael Mrozek
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