On 9 November 2016 at 18:43, H. Nikolaus Schaller <hns@goldelico.com> wrote:
"Use a “Power/Gnd pad/pin to via” ratio of 1:1 whenever possible. Do not exceed 2:1 ratio for small number of vias within restricted PCB areas (i.e. underneath BGA components)."
Maybe someone could help to translate this...
I'm quite sure they're talking about the ratio of the number of power/gnd pads to the number of vias used to connect those pads to the power/gnd plane.