The programmable divider for the asynchronous bridge to Audio Back-end (ABE) must be

set to:

- MPU_GCLK / 16 when MPU_GCLK clock is running at OPP_HIGH_MPU.

- MPU_GCLK / 8 when MPU_GCLK clock is running at OPP_NOM_MPU.

The programmable divider for the asynchronous bridge to L3 must be set to:

- MPU_GCLK / 8 when MPU_GCLK clock is running at OPP_HIGH_MPU.

- MPU_GCLK / 4 when MPU_GCLK clock is running at OPP_NOM_MPU.